Optimization of low-noise rapid data collection in TMDC semiconductor devices

• Main Author: Aggarwal, Saumay
• Other Authors: Bent Weber
• Format: Final Year Project
• Language: English
• Published: Nanyang Technological University 2022
• Subjects: Science::Physics
• Online Access: https://hdl.handle.net/10356/156980
• Institution: Nanyang Technological University

The impending stagnation of scalability in silicon semiconductor transistor industry has led researchers to explore two-dimensional transition metal dichalcogenides (TMDCs). TMDCs can be exfoliated into a few atom-thick layers with unique electrical and optical properties. TMDCs have applications in nano-electronical and optoelectrical devices such as biosensors, field effect transistors (FETs), photodiodes, nano-wearable technology, and transparent flexible displays. There is still a large research potential of these materials to investigate their properties and new physics such as spintronics and valleytronics, hence there is a need to speed up and optimize the data collection for experimentation on such devices. To this end, we compare a specialist, self-contained electrical transport measurement instrument (Nanonis Tramea TM) to a traditional setup consisting of separate lock-ins, voltage sources, and amplifiers integrated together with LabView. The trade-off between their data collection time and noise level is compared, while verifying electrical transport properties of a MoS2 based FET device. The study found the Nanonis Tramea system to be almost 100 times faster than a traditional lock-in setup with LabView, while maintaining a higher signal to noise ratio. This could potential cut down experimentation times from weeks to days. The peak mobility of the tri-layer MoS2 FET at room temperature is found to be 4.7 cm2 V-1 s-1, with an on/off ratio of 500:1.