Python extension for a convolution neural network accelerator

With the advent of artificial intelligence, machine learning, and deep learning, comes numerous possible possibilities for their applications. Neural networks that can self-learn is of particular importance. Convolutional Neural Networks (CNN) are one such neural network that has made significant st...

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Main Author: Pattanapong Khaopaibul Wu Jing Han
Other Authors: Goh Wang Ling
Format: Final Year Project
Language:English
Published: Nanyang Technological University 2022
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Online Access:https://hdl.handle.net/10356/157887
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1578872023-07-07T19:07:39Z Python extension for a convolution neural network accelerator Pattanapong Khaopaibul Wu Jing Han Goh Wang Ling School of Electrical and Electronic Engineering Institute of Microelectronics, A*STAR EWLGOH@ntu.edu.sg Engineering::Electrical and electronic engineering::Microelectronics Engineering::Electrical and electronic engineering::Computer hardware, software and systems With the advent of artificial intelligence, machine learning, and deep learning, comes numerous possible possibilities for their applications. Neural networks that can self-learn is of particular importance. Convolutional Neural Networks (CNN) are one such neural network that has made significant strides. Image classification, recognition, object detection, and many other applications have seen a rise in our everyday lives, yet more can be done. Powering these networks through traditional hardware accelerators like our everyday graphical processing units (GPUs) prove powerful and efficient, but not portable. Field Programmable Gate Arrays (FPGA) are a type of hardware accelerator that has shown promise in delivering powerful computational capabilities that mesh well with the architecture of CNNs. To capitalise on their strengths, this report aims to document the seamless porting of architecture from a user-friendly Python environment directly to FPGAs for fast implementation. Bachelor of Engineering (Electrical and Electronic Engineering) 2022-05-26T05:20:53Z 2022-05-26T05:20:53Z 2022 Final Year Project (FYP) Pattanapong Khaopaibul Wu Jing Han (2022). Python extension for a convolution neural network accelerator. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/157887 https://hdl.handle.net/10356/157887 en B2055-211 application/pdf Nanyang Technological University
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering::Electrical and electronic engineering::Microelectronics
Engineering::Electrical and electronic engineering::Computer hardware, software and systems
spellingShingle Engineering::Electrical and electronic engineering::Microelectronics
Engineering::Electrical and electronic engineering::Computer hardware, software and systems
Pattanapong Khaopaibul Wu Jing Han
Python extension for a convolution neural network accelerator
description With the advent of artificial intelligence, machine learning, and deep learning, comes numerous possible possibilities for their applications. Neural networks that can self-learn is of particular importance. Convolutional Neural Networks (CNN) are one such neural network that has made significant strides. Image classification, recognition, object detection, and many other applications have seen a rise in our everyday lives, yet more can be done. Powering these networks through traditional hardware accelerators like our everyday graphical processing units (GPUs) prove powerful and efficient, but not portable. Field Programmable Gate Arrays (FPGA) are a type of hardware accelerator that has shown promise in delivering powerful computational capabilities that mesh well with the architecture of CNNs. To capitalise on their strengths, this report aims to document the seamless porting of architecture from a user-friendly Python environment directly to FPGAs for fast implementation.
author2 Goh Wang Ling
author_facet Goh Wang Ling
Pattanapong Khaopaibul Wu Jing Han
format Final Year Project
author Pattanapong Khaopaibul Wu Jing Han
author_sort Pattanapong Khaopaibul Wu Jing Han
title Python extension for a convolution neural network accelerator
title_short Python extension for a convolution neural network accelerator
title_full Python extension for a convolution neural network accelerator
title_fullStr Python extension for a convolution neural network accelerator
title_full_unstemmed Python extension for a convolution neural network accelerator
title_sort python extension for a convolution neural network accelerator
publisher Nanyang Technological University
publishDate 2022
url https://hdl.handle.net/10356/157887
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