Design of the inductive DC-DC buck converter

This project introduces the design of a voltage mode PWM buck converter using Global Foundries 55nm CMOS technology process. The functional circuit blocks being covered includes the power stage of buck converter, error amplifier, bandgap voltage reference, comparator, dead-time control circuit and d...

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Bibliographic Details
Main Author: Lee, Carmen May Yee
Other Authors: Siek Liter
Format: Final Year Project
Language:English
Published: Nanyang Technological University 2022
Subjects:
Online Access:https://hdl.handle.net/10356/158283
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Institution: Nanyang Technological University
Language: English
Description
Summary:This project introduces the design of a voltage mode PWM buck converter using Global Foundries 55nm CMOS technology process. The functional circuit blocks being covered includes the power stage of buck converter, error amplifier, bandgap voltage reference, comparator, dead-time control circuit and driving stage. The power stage of buck converter has an efficiency of 91.77% when load current is 100mA at 250kHz. The input voltage is designed to be 3V with an output voltage of 1V. When buck converter performs at 250kHz with load current of 100mA, the inductor current ripple is about 8.72mA and the output voltage ripple is approximately 35.53mV at the nominal case. On the other hand, the buck converter can support load current ranging from 100nA to 500mA, with the switching frequency varies from 250kHz to 20MHz.