A 98.6 dB SNDR SAR ADC with a mismatch error shaping technique implemented with double sampling

• Main Authors: Yang, Chuanshi, Qiu, Lei, Tang, Kai, Zheng, Yuanjin
• Other Authors: School of Electrical and Electronic Engineering
• Format: Article
• Language: English
• Published: 2022
• Subjects: Engineering::Electrical and electronic engineering; High Resolution; High Linearity
• Online Access: https://hdl.handle.net/10356/162055
• Institution: Nanyang Technological University

A novel mismatch error shaping (MES) method is proposed in noise-shaping (NS) SAR ADCs to break the SNDR limitation caused by DAC mismatch induced non-linearity. Through sampling the signal twice for one conversion, the input range of the ADC is increased to 2V {ref}. After the first sampling, only the MSB is resolved and the results feed back to the opposite side of the DAC. After the second sampling, the MSB result is reversed and a +text{V}_{ref} /2 reference is generated at the side of the DAC which has low input while a - text{V}_{ref} /2 reference is generated at the other side. Through this method, the dynamic range deduction caused by the MES technique is solved. The proposed SAR ADC is implemented in TSMC 65nm CMOS technology. The simulation results show that the new MES method improves the SFDR from 54 dB to 104.5 dB. The SNDR in 20kHz bandwidth is 98.6dB while power consumption is 513.2~ {mu }text{W} under a 1 V power supply at 20MS/s sampling rate.