Latency-constrained DNN architecture learning for edge systems using zerorized batch normalization

• Main Authors: Huai, Shuo, Liu, Di, Kong, Hao, Liu, Weichen, Subramaniam, Ravi, Makaya, Christian, Lin, Qian
• Other Authors: School of Computer Science and Engineering
• Format: Article
• Language: English
• Published: 2023
• Subjects: Engineering::Computer science and engineering::Software::Software engineering; Latency Optimization; Edge Device; Latency Prediction
• Online Access: https://hdl.handle.net/10356/165565
• Institution: Nanyang Technological University

Deep learning applications have been widely adopted on edge devices, to mitigate the privacy and latency issues of accessing cloud servers. Deciding the number of neurons during the design of a deep neural network to maximize performance is not intuitive. Particularly, many application scenarios are...