Energy-efficient hardware accelerators based on bit-serial graph and memory-centric computing architectures
As semiconductor process technology nodes have shrunk over the past few decades, the complexity of application-specific integrated circuits (ASICs) has grown significantly. Emerging ASICs have been widely explored to accelerate various algorithms with high energy efficiency, including machine learni...
محفوظ في:
| المؤلف الرئيسي: | |
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| مؤلفون آخرون: | |
| التنسيق: | Thesis-Doctor of Philosophy |
| اللغة: | English |
| منشور في: |
Nanyang Technological University
2023
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| الموضوعات: | |
| الوصول للمادة أونلاين: | https://hdl.handle.net/10356/165577 |
| الوسوم: |
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