Energy-efficient hardware accelerators based on bit-serial graph and memory-centric computing architectures
As semiconductor process technology nodes have shrunk over the past few decades, the complexity of application-specific integrated circuits (ASICs) has grown significantly. Emerging ASICs have been widely explored to accelerate various algorithms with high energy efficiency, including machine learni...
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格式: | Thesis-Doctor of Philosophy |
語言: | English |
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Nanyang Technological University
2023
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在線閱讀: | https://hdl.handle.net/10356/165577 |
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