APB bus SPI system level verification based on universal verification methodology

• Main Author: Lyu, Lingkun
• Other Authors: Gwee Bah Hwee
• Format: Thesis-Master by Coursework
• Language: English
• Published: Nanyang Technological University 2023
• Subjects: Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: https://hdl.handle.net/10356/165956
• Institution: Nanyang Technological University

This dissertation is target to the study of utilizing a improved method to verify APB bus SPI (Serial Peripheral Interface) in a MCU chip. At present, with the development of SoC (System on Chip) design technology and its increasing complexity, it is an important challenge to quickly develop SoC products and promote them to the market under the fierce competition from major manufacturers. SoC is formed by the integration of a large number of IP (Intellectual Property). In order to quickly develop SoC products, the method of IP core reuse can be used. IP core reuse means that some IPs are developed in advance, and these completed IPs can be integrated into the SoC when developing the SoC, which saves the time for re-development of the IP and improves the development efficiency. SPI (Serial Peripheral Interface) interface is an important peripheral interface in APB bus, which is used for communication between the CPU, DMA and other external devices. It can be used in various fields such as embedded, wireless transceiver, RF communication, etc. Therefore, the development of SPI interface IP core is of great significance and value. In this project, a platform environment that can be efficiently simulated and verified is built based on UVM and SystemVerilog. UVM (Universal Verification Methodology) is the latest verification methodology with powerful functions and advantages. This topic built a highly reusable verification platform environment according to UVM theory, improving the problem that the traditional verification environment is not easily portable. In addition, efficient scripts have been written to make the verification process more automated, improving the problem of long manual running time of traditional verification, and improving the efficiency of IC development. Besides, in order to verify the function points of the designed SPI interface, a large number of test cases were written for simulation. Using the built verification platform to run the test case of the SPI interface function point, the simulation result is correct. After using the prepared script to generate a large number of random number seeds, and applying a large amount of incentives for regression verification, the code coverage rate is 90.3%, the assertion coverage rate is 100%, and the function coverage rate is 100%, which shows the completeness of functional verification. The final developed SPI interface IP has been fully functionally verified to meet the verification requirements.