Design of time-to-digital converter and chip applications

Design of time-to-digital converter and chip applications

Time-to-digital converter (TDC) is very important in products which need precise time meaurement, compact size and low power consumption. In this thesis, a 8-stages GRO (Gated Ring Oscillator) TDC with high resolution and high linearity is presented. A fully delay cell gated ring oscillator and T...

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Main Author: Xiong, Weihao
Other Authors: Tang Xiaohong
Format: Thesis-Master by Coursework
Language:English
Published: Nanyang Technological University 2023
Subjects:
Engineering::Electrical and electronic engineering
Online Access:https://hdl.handle.net/10356/166901
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1669012023-07-04T15:34:41Z Design of time-to-digital converter and chip applications Xiong, Weihao Tang Xiaohong School of Electrical and Electronic Engineering EXHTang@ntu.edu.sg Engineering::Electrical and electronic engineering Time-to-digital converter (TDC) is very important in products which need precise time meaurement, compact size and low power consumption. In this thesis, a 8-stages GRO (Gated Ring Oscillator) TDC with high resolution and high linearity is presented. A fully delay cell gated ring oscillator and TSPC are mainly placed in this architecture. The counting measure consists of two parts, coarse time counting and fine time counting respectively. Coarse counter is applied in order to increase the dynamic range, while fine counter is focused on resolution. In a 55nm BCD GF technology, the proposed TDC reaches a large detectable range and high precision. The core TDC’s total power consumption is only 10.5mW with 1.2V power supply. Master of Science (Green Electronics) 2023-05-11T11:42:55Z 2023-05-11T11:42:55Z 2023 Thesis-Master by Coursework Xiong, W. (2023). Design of time-to-digital converter and chip applications. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/166901 https://hdl.handle.net/10356/166901 en application/pdf Nanyang Technological University
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering::Electrical and electronic engineering
spellingShingle Engineering::Electrical and electronic engineering
Xiong, Weihao
Design of time-to-digital converter and chip applications
description Time-to-digital converter (TDC) is very important in products which need precise time meaurement, compact size and low power consumption. In this thesis, a 8-stages GRO (Gated Ring Oscillator) TDC with high resolution and high linearity is presented. A fully delay cell gated ring oscillator and TSPC are mainly placed in this architecture. The counting measure consists of two parts, coarse time counting and fine time counting respectively. Coarse counter is applied in order to increase the dynamic range, while fine counter is focused on resolution. In a 55nm BCD GF technology, the proposed TDC reaches a large detectable range and high precision. The core TDC’s total power consumption is only 10.5mW with 1.2V power supply.
author2 Tang Xiaohong
author_facet Tang Xiaohong
Xiong, Weihao
format Thesis-Master by Coursework
author Xiong, Weihao
author_sort Xiong, Weihao
title Design of time-to-digital converter and chip applications
title_short Design of time-to-digital converter and chip applications
title_full Design of time-to-digital converter and chip applications
title_fullStr Design of time-to-digital converter and chip applications
title_full_unstemmed Design of time-to-digital converter and chip applications
title_sort design of time-to-digital converter and chip applications
publisher Nanyang Technological University
publishDate 2023
url https://hdl.handle.net/10356/166901
_version_ 1772827617162952704

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