The design of a high efficiency low input power RF-DC rectifier for sensor node

This report consists of the design of a High Efficiency Low Input Power RF-DC Rectifier for sensor node. The design of a RF-DC Rectifier aims to optimize area-to efficiency under a low input power condition for a sensor node application. The circuit will be designed and simulated using Cadense V...

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Bibliographic Details
Main Author: Chin, Wen Yao
Other Authors: Siek Liter
Format: Final Year Project
Language:English
Published: Nanyang Technological University 2023
Subjects:
Online Access:https://hdl.handle.net/10356/167492
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Institution: Nanyang Technological University
Language: English
Description
Summary:This report consists of the design of a High Efficiency Low Input Power RF-DC Rectifier for sensor node. The design of a RF-DC Rectifier aims to optimize area-to efficiency under a low input power condition for a sensor node application. The circuit will be designed and simulated using Cadense Virtuoso. The aim is to be able to use surrounding energy of radio frequency to power sensor node, which will require high efficiency as it should be under low input power conditions. This paper uses a cross coupled rectifier as a base for the rectifier to convert RF to DC. And it will be tested over 2 different input power levels so that the sensor node will be able to work in different conditions. This paper will be testing over the 16 dBm and 24 dBm power level and adding the 2 rectifiers together to get a more stable output over the different power levels. The project successfully harvests the radio frequency to DC to power sensor nodes with high efficiency over both 16 dBm and 24 dBm. High efficiency during low input situations is achieved using the many different methods to optimize the efficiency.