Research and design of sub-T band radio frequency integrated circuit frequency multipliers

This dissertation mainly working on the study of CMOS millimetre-wave frequency multipliers. By reviewing the literature on global frequency multiplier research, the methodology of frequency multiplier design is outlined and the basic theory of frequency multiplier design is explanation. Finally, a...

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Main Author: Shen, Wangyi
Other Authors: Zheng Yuanjin
Format: Thesis-Master by Coursework
Language:English
Published: Nanyang Technological University 2023
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Online Access:https://hdl.handle.net/10356/168205
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1682052023-07-04T16:41:15Z Research and design of sub-T band radio frequency integrated circuit frequency multipliers Shen, Wangyi Zheng Yuanjin School of Electrical and Electronic Engineering YJZHENG@ntu.edu.sg Engineering::Computer science and engineering This dissertation mainly working on the study of CMOS millimetre-wave frequency multipliers. By reviewing the literature on global frequency multiplier research, the methodology of frequency multiplier design is outlined and the basic theory of frequency multiplier design is explanation. Finally, a 250 GHz frequency doubler based on 65 nm CMOS process is designed. The design of the frequency doubler uses a classical structure called push-push to fullfill a 250 GHz frequency doubler, which shows a wide output signal bandwidth and effectively improves the doubling gain and harmonic rejection. The stability factor is showed by pre-simulation results of the frequency doubler and it is much higher than 1 in the operating frequency range. In other words, the circuit is absolutely stable, with a frequency doubling gain of -13.21 to -12.33 dB and a spurious rejection ratio of more than 15 dBc at an input frequency of 115-140 GHz. The second harmonic signal at the output is relatively flat, with a 3 dB bandwidth of 98 to 147 GHz and a relative bandwidth of 39.2%. This frequency doubler can improve the harmonic rejection capability and at the same time obtain a relatively wide output signal bandwidth, which can meet the requirements of 250GHz broadband communication system. Master of Science (Electronics) 2023-05-23T06:15:47Z 2023-05-23T06:15:47Z 2023 Thesis-Master by Coursework Shen, W. (2023). Research and design of sub-T band radio frequency integrated circuit frequency multipliers. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/168205 https://hdl.handle.net/10356/168205 en application/pdf Nanyang Technological University
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering::Computer science and engineering
spellingShingle Engineering::Computer science and engineering
Shen, Wangyi
Research and design of sub-T band radio frequency integrated circuit frequency multipliers
description This dissertation mainly working on the study of CMOS millimetre-wave frequency multipliers. By reviewing the literature on global frequency multiplier research, the methodology of frequency multiplier design is outlined and the basic theory of frequency multiplier design is explanation. Finally, a 250 GHz frequency doubler based on 65 nm CMOS process is designed. The design of the frequency doubler uses a classical structure called push-push to fullfill a 250 GHz frequency doubler, which shows a wide output signal bandwidth and effectively improves the doubling gain and harmonic rejection. The stability factor is showed by pre-simulation results of the frequency doubler and it is much higher than 1 in the operating frequency range. In other words, the circuit is absolutely stable, with a frequency doubling gain of -13.21 to -12.33 dB and a spurious rejection ratio of more than 15 dBc at an input frequency of 115-140 GHz. The second harmonic signal at the output is relatively flat, with a 3 dB bandwidth of 98 to 147 GHz and a relative bandwidth of 39.2%. This frequency doubler can improve the harmonic rejection capability and at the same time obtain a relatively wide output signal bandwidth, which can meet the requirements of 250GHz broadband communication system.
author2 Zheng Yuanjin
author_facet Zheng Yuanjin
Shen, Wangyi
format Thesis-Master by Coursework
author Shen, Wangyi
author_sort Shen, Wangyi
title Research and design of sub-T band radio frequency integrated circuit frequency multipliers
title_short Research and design of sub-T band radio frequency integrated circuit frequency multipliers
title_full Research and design of sub-T band radio frequency integrated circuit frequency multipliers
title_fullStr Research and design of sub-T band radio frequency integrated circuit frequency multipliers
title_full_unstemmed Research and design of sub-T band radio frequency integrated circuit frequency multipliers
title_sort research and design of sub-t band radio frequency integrated circuit frequency multipliers
publisher Nanyang Technological University
publishDate 2023
url https://hdl.handle.net/10356/168205
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