Hardware implementation of modulo multipliers for international data encryption algorithm
Keeping the information secret is one of the key functions of cryptography. In recent years, a lot of research is done in the area of block cipher algorithms. International Data Encryption Algorithm (IDEA) is one of the most reliable block cipher algorithm. Among the three basic operations, modu...
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sg-ntu-dr.10356-170632023-07-07T16:28:20Z Hardware implementation of modulo multipliers for international data encryption algorithm Liao, Jia. Chang Chip Hong School of Electrical and Electronic Engineering Centre for High Performance Embedded Systems DRNTU::Engineering::Computer science and engineering::Data::Data encryption Keeping the information secret is one of the key functions of cryptography. In recent years, a lot of research is done in the area of block cipher algorithms. International Data Encryption Algorithm (IDEA) is one of the most reliable block cipher algorithm. Among the three basic operations, modulo (2^16+1) multiplication is most critical for the efficient algorithm implementation. In this project, two efficient modulo multiplier designs are coded in VHDL language and they are simulated using ModelSim. Bachelor of Engineering 2009-05-29T04:56:13Z 2009-05-29T04:56:13Z 2009 2009 Final Year Project (FYP) http://hdl.handle.net/10356/17063 en Nanyang Technological University 56 p. application/pdf |
| institution |
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| continent |
Asia |
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Singapore Singapore |
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English |
| topic |
DRNTU::Engineering::Computer science and engineering::Data::Data encryption |
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DRNTU::Engineering::Computer science and engineering::Data::Data encryption Liao, Jia. Hardware implementation of modulo multipliers for international data encryption algorithm |
| description |
Keeping the information secret is one of the key functions of cryptography. In recent years, a lot of research is done in the area of block cipher algorithms. International Data Encryption Algorithm (IDEA) is one of the most reliable block cipher algorithm.
Among the three basic operations, modulo (2^16+1) multiplication is most critical for the efficient algorithm implementation. In this project, two efficient modulo multiplier designs are coded in VHDL language and they are simulated using ModelSim. |
| author2 |
Chang Chip Hong |
| author_facet |
Chang Chip Hong Liao, Jia. |
| format |
Final Year Project |
| author |
Liao, Jia. |
| author_sort |
Liao, Jia. |
| title |
Hardware implementation of modulo multipliers for international data encryption algorithm |
| title_short |
Hardware implementation of modulo multipliers for international data encryption algorithm |
| title_full |
Hardware implementation of modulo multipliers for international data encryption algorithm |
| title_fullStr |
Hardware implementation of modulo multipliers for international data encryption algorithm |
| title_full_unstemmed |
Hardware implementation of modulo multipliers for international data encryption algorithm |
| title_sort |
hardware implementation of modulo multipliers for international data encryption algorithm |
| publishDate |
2009 |
| url |
http://hdl.handle.net/10356/17063 |
| _version_ |
1772827366090866688 |