Full-stack web development for auto-assessment platform
The field of Computer Science education has witnessed a surge in the number of students seeking to understand its intricate concepts. As the demand for quality education grows, the need for efficient evaluation tools becomes increasingly evident. While automated assessment platforms have proved i...
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| Format: | Final Year Project |
| Language: | English |
| Published: |
Nanyang Technological University
2023
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| Online Access: | https://hdl.handle.net/10356/171971 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | The field of Computer Science education has witnessed a surge in the number of
students seeking to understand its intricate concepts. As the demand for quality
education grows, the need for efficient evaluation tools becomes increasingly
evident. While automated assessment platforms have proved invaluable in evaluating
programming skills, they fall short when it comes to assessing Hardware Description
Languages (HDLs). HDLs are specialized languages used to simulate digital circuits
and systems, posing unique challenges that current assessment tools designed for
General-Purpose Programming Languages (GPLs) cannot address.
This study builds upon the Automated Assessment Platform (AASP) developed by
previous FYP works, enhancing its capabilities to accommodate HDL assessments.
Leveraging the strengths of the existing AASP architecture and the scalable
technology stacks, a comprehensive solution is devised to assess HDL assessments
effectively. The approach is based on modifying the Judge0 framework, a recognized
Online Judge System (OJS), to compile HDL code and visualize interactive
waveforms generated by students' compiled HDL code. |
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