Modulation methods for balancing the capacitor voltages of N-level diode-clamped converters

• Main Authors: Yuan, Huawei, Lam, Hin Sang, Beniwal, Neha, Pou, Josep, Hui, Ron Shu-Yuen
• Other Authors: School of Electrical and Electronic Engineering
• Format: Article
• Language: English
• Published: 2023
• Subjects: Engineering::Electrical and electronic engineering; Capacitor Voltage Balance; Multilevel Converter
• Online Access: https://hdl.handle.net/10356/172323
• Institution: Nanyang Technological University

Diode-clamped converters (DCCs) suffer from the inherent capacitor voltage imbalance problem. Most software-based voltage-balancing methods fall into the space vector modulation category and the carrier-based pulsewidth modulation category. Despite their effectiveness for the three-level DCCs, it is not easy to extend them to a general n-level topology. In this article, a new modulation method of a category called good-switching (GS) PWM is proposed for balancing the capacitor voltages. The proposed method requires no parameter-tuning effort and is extremely simple to design even for the n-level topology regardless of the number of phases. It is also potentially applicable to other multilevel converters. The principle, the implementation, and the stability analysis of GS-PWM are elaborated for a generic n-level DCC. A modified GS-PWM scheme and an on-off control scheme are proposed to reduce the switching transitions for further realizing the advantages of the GS-PWM. Particularly, the on-off control can be extended to many other voltage-balancing methods. Simulation and experiments with a five-level DCC validate the proposed methods.