Machine learning analysis on logic locked circuits

To reduce the design effort and cost, now many semiconductor companies are fabless. During the outsource fabrication and test process, logic locking is widely used to protect their intellectual Property (IP) from untrustworthy access. Logic locking conceals the designed functionality by adding key i...

Full description

Saved in:
Bibliographic Details
Main Author: Li, Zexuan
Other Authors: Gwee Bah Hwee
Format: Thesis-Master by Coursework
Language:English
Published: Nanyang Technological University 2024
Subjects:
Online Access:https://hdl.handle.net/10356/172962
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-172962
record_format dspace
spelling sg-ntu-dr.10356-1729622024-01-12T15:45:44Z Machine learning analysis on logic locked circuits Li, Zexuan Gwee Bah Hwee School of Electrical and Electronic Engineering ebhgwee@ntu.edu.sg Engineering::Electrical and electronic engineering To reduce the design effort and cost, now many semiconductor companies are fabless. During the outsource fabrication and test process, logic locking is widely used to protect their intellectual Property (IP) from untrustworthy access. Logic locking conceals the designed functionality by adding key inputs together with additional gates to the original circuit. Without the correct key inputs, attackers can not reveal the encrypted design. In the past decades, several attack methods were proposed to test the vulnerability of existing logic locking methods. Meanwhile, to counter these attack methods, novel defences technology were also developed. In recent years, Machine learning based attacking methods became prominent. Compared with traditional attack methods, oracle (an unlocking circuit) is not needed in machine-learning-based attacks. But their accuracy is unsatisfactory. In this paper, different logic locking attack methods will be introduced and compared. Graph Neural Network (GNN) will be used to decode the locked circuits. The netlists are naturally converted in to the neural graph, and the keys are derived from classification task of neural networks. The relationship between the accuracy and circuit size will also be summarized. Master of Science (Electronics) 2024-01-08T06:12:10Z 2024-01-08T06:12:10Z 2023 Thesis-Master by Coursework Li, Z. (2023). Machine learning analysis on logic locked circuits. Master's thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/172962 https://hdl.handle.net/10356/172962 en application/pdf Nanyang Technological University
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering::Electrical and electronic engineering
spellingShingle Engineering::Electrical and electronic engineering
Li, Zexuan
Machine learning analysis on logic locked circuits
description To reduce the design effort and cost, now many semiconductor companies are fabless. During the outsource fabrication and test process, logic locking is widely used to protect their intellectual Property (IP) from untrustworthy access. Logic locking conceals the designed functionality by adding key inputs together with additional gates to the original circuit. Without the correct key inputs, attackers can not reveal the encrypted design. In the past decades, several attack methods were proposed to test the vulnerability of existing logic locking methods. Meanwhile, to counter these attack methods, novel defences technology were also developed. In recent years, Machine learning based attacking methods became prominent. Compared with traditional attack methods, oracle (an unlocking circuit) is not needed in machine-learning-based attacks. But their accuracy is unsatisfactory. In this paper, different logic locking attack methods will be introduced and compared. Graph Neural Network (GNN) will be used to decode the locked circuits. The netlists are naturally converted in to the neural graph, and the keys are derived from classification task of neural networks. The relationship between the accuracy and circuit size will also be summarized.
author2 Gwee Bah Hwee
author_facet Gwee Bah Hwee
Li, Zexuan
format Thesis-Master by Coursework
author Li, Zexuan
author_sort Li, Zexuan
title Machine learning analysis on logic locked circuits
title_short Machine learning analysis on logic locked circuits
title_full Machine learning analysis on logic locked circuits
title_fullStr Machine learning analysis on logic locked circuits
title_full_unstemmed Machine learning analysis on logic locked circuits
title_sort machine learning analysis on logic locked circuits
publisher Nanyang Technological University
publishDate 2024
url https://hdl.handle.net/10356/172962
_version_ 1789483087043756032