Command file application in PV sign off for IC design
Integrated circuits (IC), also known as chips, are a major scientific and technological achievement and are widely used in various fields. As semiconductor technology continues to advance, chip design becomes more and more complex. Robust verification methods are therefore needed to ensure the relia...
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| Format: | Thesis-Master by Coursework |
| Language: | English |
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Nanyang Technological University
2024
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| Online Access: | https://hdl.handle.net/10356/173686 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | Integrated circuits (IC), also known as chips, are a major scientific and technological achievement and are widely used in various fields. As semiconductor technology continues to advance, chip design becomes more and more complex. Robust verification methods are therefore needed to ensure the reliably. This dissertation takes an in-depth look at physical verification (PV) during the sign off phase of IC design, highlighting the important role of command files written in the Standard Verification Rule Format (SVRF) language.
It begins with an overview of IC design, addressing both digital and analog aspects and discussing the holistic design flow. Moving into the realm of PV and PV sign off, the dissertation introduces fundamental concepts and relevant software tools. The subsequent section navigates through the intricacies of writing command files, introducing the PV language SVRF and its syntax, along with insights into enhancing it using TCL. Following this, the dissertation delves into the practical implementation of command files for PV sign off, elucidating the structures of header and rule files. A comprehensive analysis of PV sign-off violations, spanning DRC, LVS, ERC, and ANT violations, showcases the effectiveness of command files in identifying and rectifying design issues during the sign-off phase. This article finally talks about the future of PV sign off in the era of artificial intelligence (AI). |
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