New hybrid multilevel converters: control and fault-tolerant capability
In recent years, multilevel voltage source converters (ML-VSCs) have gained significant attention due to their remarkable ability to produce high-quality voltage waveforms with reduced harmonic content. This makes them exceptionally well-suited for a wide range of industrial applications. Recent dev...
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Format: | Thesis-Master by Research |
Language: | English |
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Nanyang Technological University
2024
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Online Access: | https://hdl.handle.net/10356/173895 |
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Institution: | Nanyang Technological University |
Language: | English |
Summary: | In recent years, multilevel voltage source converters (ML-VSCs) have gained significant attention due to their remarkable ability to produce high-quality voltage waveforms with reduced harmonic content. This makes them exceptionally well-suited for a wide range of industrial applications. Recent developments in hybrid multilevel converters have focused on combining one or two classical multilevel converter topologies. Nonetheless, challenges have emerged in ML-VSCs, notably low-frequency voltage ripples at the neutral point and voltage balancing, which may affect the safe and secure operation. Like conventional multilevel converters, hybrid ML-VSCs necessitate precise control strategies for such challenges. To address this, finite-control-set model predictive control (FCS-MPC) has demonstrated superiority over traditional modulation and control methods. FCS-MPC offers advantages such as lower harmonic distortion in the output, inherent closed-loop active control capabilities, and control for multi-variable/multi-objective. However, while using a multi-variable control objective, the weighting factors are not optimized as a result, this may affect the secure and safe operation of the converter. Moreover, considering the context of industrial applications, semiconductors are fragile components prone to failure. Therefore, the fault-tolerant capability of specific converter topologies becomes a decisive advantage in dealing with unforeseen faulty power device situations. In this context, this thesis centers on the development of hybrid multilevel voltage source converters, with a focus on the following aspects: 1) the development of new hybrid multilevel converter topology with reduced components and low-frequency voltage ripples, 2) advancement in FCS-MPC with optimized weighting factor to improve output waveform tracking with reduced harmonic distortion, 3) investigation and design of fault-tolerant capability to deal with sudden failure of power device in the proposed topology.
Chapter 2 begins by exploring the conventional ML-VSC topologies and introduces the generation of new hybrid ML-VSCs, all incorporating the split-source configuration. Three new topologies are presented within this Chapter, namely the dual-DC-port asymmetrical multilevel (DP-AM) converter, the modified active nested neutral point clamped (MANNPC) converter, and the improved SMC (ISMC) converter. Chapter 3 investigates the control strategy for the proposed three new hybrid ML-VSCs based on FCS-MPC. In Chapter 4, advanced FCS-MPC is developed to address the challenges of weighting factors. Two solutions grounded in the principle of Pareto-optimality are introduced in this Chapter. One is an offline heuristic method for fine-tuning weighting factors. At the same time, the other is an advanced FCS-MPC approach that analyzes the reflex angle online and eliminates the need for weighting factors. Chapter 5 demonstrates the fault-tolerant capability of the proposed multilevel converter, considering various fault scenarios involving power devices of the topology. A fault-tolerant FCS-MPC controller is modified for the DP-AM converter, and this approach eliminates the need for control structure reconfiguration or additional fault detection, making it a straightforward solution. Regarding the ISMC converter, a reconfigured fault-tolerant control is proposed to address faults and maintain undistorted long-term post-fault operation. Each Chapter provides the simulation and experiment results to support the topology, control strategy, and fault-tolerant results. |
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