Software defined network-on-chip

In the rapidly evolving field of computer engineering, the optimization of Network-On-Chip (NoC) emerges as a crucial area of research, primarily for its application within Heterogeneous Computing Systems (HCSs). This report delves into the development and evaluation of the MARCO framework – a hi...

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Main Author: Heng, Yin Cang
Other Authors: Weichen Liu
Format: Final Year Project
Language:English
Published: Nanyang Technological University 2024
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Online Access:https://hdl.handle.net/10356/175121
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1751212024-04-26T15:40:38Z Software defined network-on-chip Heng, Yin Cang Weichen Liu School of Computer Science and Engineering Parallel and Distributed Computing Centre liu@ntu.edu.sg Engineering In the rapidly evolving field of computer engineering, the optimization of Network-On-Chip (NoC) emerges as a crucial area of research, primarily for its application within Heterogeneous Computing Systems (HCSs). This report delves into the development and evaluation of the MARCO framework – a high-performance task mapping and routing cooptimization framework for NoC-based HCSs. This research is mainly motivated by the challenges posed by the increasingly complex demands of modern computing systems, where heterogeneity and computational power are highly prioritized. This research focuses on analyzing and understanding the MARCO framework, which aims to address scalability concerns by co-optimizing routing and mapping within point-to-point NoC-based HCSs to minimize schedule lengths. This study attempts to use the Gem5 simulation environment to compare MARCO against contemporary algorithms, while employing a Python environment to perform analysis on the MARCO algorithm. The reports show methods used for the analysis, system design and implementation, complications that arose during research and the experimental results. The findings underscore MARCO's superiority in scalability and performance, particularly in larger NoC mesh configurations where its co-optimization approach significantly reduces schedule lengths. However, due to simulation constraints, concrete and reliable data was not acquired, requiring further referencing of past research to obtain suitable benchmarks for performance, this is an area for potential research in the future. This report is concluded with recommendations for further research, emphasising MARCO’s unique capabilities of co-optimization, as well as outlining future directions such as expanding the horizon beyond time constraints. Alongside that, it also suggests that collaboration be done to tackle present issues such as the lack of concrete data arising from simulation constraints. This study contributes to the ongoing development of NoC architectures, offering insights into future research, thereby laying the roadmap for future development of the NoC systems to keep up with the demands of the modern applications and systems Bachelor's degree 2024-04-22T01:18:21Z 2024-04-22T01:18:21Z 2024 Final Year Project (FYP) Heng, Y. C. (2024). Software defined network-on-chip. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/175121 https://hdl.handle.net/10356/175121 en SCSE23-0084 application/pdf Nanyang Technological University
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering
spellingShingle Engineering
Heng, Yin Cang
Software defined network-on-chip
description In the rapidly evolving field of computer engineering, the optimization of Network-On-Chip (NoC) emerges as a crucial area of research, primarily for its application within Heterogeneous Computing Systems (HCSs). This report delves into the development and evaluation of the MARCO framework – a high-performance task mapping and routing cooptimization framework for NoC-based HCSs. This research is mainly motivated by the challenges posed by the increasingly complex demands of modern computing systems, where heterogeneity and computational power are highly prioritized. This research focuses on analyzing and understanding the MARCO framework, which aims to address scalability concerns by co-optimizing routing and mapping within point-to-point NoC-based HCSs to minimize schedule lengths. This study attempts to use the Gem5 simulation environment to compare MARCO against contemporary algorithms, while employing a Python environment to perform analysis on the MARCO algorithm. The reports show methods used for the analysis, system design and implementation, complications that arose during research and the experimental results. The findings underscore MARCO's superiority in scalability and performance, particularly in larger NoC mesh configurations where its co-optimization approach significantly reduces schedule lengths. However, due to simulation constraints, concrete and reliable data was not acquired, requiring further referencing of past research to obtain suitable benchmarks for performance, this is an area for potential research in the future. This report is concluded with recommendations for further research, emphasising MARCO’s unique capabilities of co-optimization, as well as outlining future directions such as expanding the horizon beyond time constraints. Alongside that, it also suggests that collaboration be done to tackle present issues such as the lack of concrete data arising from simulation constraints. This study contributes to the ongoing development of NoC architectures, offering insights into future research, thereby laying the roadmap for future development of the NoC systems to keep up with the demands of the modern applications and systems
author2 Weichen Liu
author_facet Weichen Liu
Heng, Yin Cang
format Final Year Project
author Heng, Yin Cang
author_sort Heng, Yin Cang
title Software defined network-on-chip
title_short Software defined network-on-chip
title_full Software defined network-on-chip
title_fullStr Software defined network-on-chip
title_full_unstemmed Software defined network-on-chip
title_sort software defined network-on-chip
publisher Nanyang Technological University
publishDate 2024
url https://hdl.handle.net/10356/175121
_version_ 1806059858472992768