Cache coherence and network-on-chip (1)
Although multiprocessors have shown improved performance in various domains, cache coherence problem in multiprocessors may serve as a hurdle, reducing the multiprocessors' overall performance and task-handling efficiency. The main reason is the need to maintain coherency amongst multiprocessor...
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sg-ntu-dr.10356-1753322024-04-26T15:44:36Z Cache coherence and network-on-chip (1) Lew, Kah Hoa Weichen Liu School of Computer Science and Engineering liu@ntu.edu.sg Engineering Cache coherence Although multiprocessors have shown improved performance in various domains, cache coherence problem in multiprocessors may serve as a hurdle, reducing the multiprocessors' overall performance and task-handling efficiency. The main reason is the need to maintain coherency amongst multiprocessors' growing number of cores.This project aims to understand and study the performance of cache coherence protocols with increasing cores in multiprocessors. The study involves conducting experiments on commonly used cache coherence protocols, employing various workloads, and adjusting the number of cores. Bachelor's degree 2024-04-23T11:38:55Z 2024-04-23T11:38:55Z 2024 Final Year Project (FYP) Lew, K. H. (2024). Cache coherence and network-on-chip (1). Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/175332 https://hdl.handle.net/10356/175332 en application/pdf Nanyang Technological University |
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Engineering Cache coherence Lew, Kah Hoa Cache coherence and network-on-chip (1) |
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Although multiprocessors have shown improved performance in various domains, cache coherence problem in multiprocessors may serve as a hurdle, reducing the multiprocessors' overall performance and task-handling efficiency. The main reason is the need to maintain coherency amongst multiprocessors' growing number of cores.This project aims to understand and study the performance of cache coherence protocols with increasing cores in multiprocessors. The study involves conducting experiments on commonly used cache coherence protocols, employing various workloads, and adjusting the number of cores. |
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Weichen Liu |
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Weichen Liu Lew, Kah Hoa |
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Final Year Project |
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Lew, Kah Hoa |
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Lew, Kah Hoa |
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Cache coherence and network-on-chip (1) |
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Cache coherence and network-on-chip (1) |
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Cache coherence and network-on-chip (1) |
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Cache coherence and network-on-chip (1) |
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Cache coherence and network-on-chip (1) |
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cache coherence and network-on-chip (1) |
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Nanyang Technological University |
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2024 |
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https://hdl.handle.net/10356/175332 |
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