Cache coherence and network-on-chip (1)

Although multiprocessors have shown improved performance in various domains, cache coherence problem in multiprocessors may serve as a hurdle, reducing the multiprocessors' overall performance and task-handling efficiency. The main reason is the need to maintain coherency amongst multiprocessor...

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Main Author: Lew, Kah Hoa
Other Authors: Weichen Liu
Format: Final Year Project
Language:English
Published: Nanyang Technological University 2024
Subjects:
Online Access:https://hdl.handle.net/10356/175332
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1753322024-04-26T15:44:36Z Cache coherence and network-on-chip (1) Lew, Kah Hoa Weichen Liu School of Computer Science and Engineering liu@ntu.edu.sg Engineering Cache coherence Although multiprocessors have shown improved performance in various domains, cache coherence problem in multiprocessors may serve as a hurdle, reducing the multiprocessors' overall performance and task-handling efficiency. The main reason is the need to maintain coherency amongst multiprocessors' growing number of cores.This project aims to understand and study the performance of cache coherence protocols with increasing cores in multiprocessors. The study involves conducting experiments on commonly used cache coherence protocols, employing various workloads, and adjusting the number of cores. Bachelor's degree 2024-04-23T11:38:55Z 2024-04-23T11:38:55Z 2024 Final Year Project (FYP) Lew, K. H. (2024). Cache coherence and network-on-chip (1). Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/175332 https://hdl.handle.net/10356/175332 en application/pdf Nanyang Technological University
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering
Cache coherence
spellingShingle Engineering
Cache coherence
Lew, Kah Hoa
Cache coherence and network-on-chip (1)
description Although multiprocessors have shown improved performance in various domains, cache coherence problem in multiprocessors may serve as a hurdle, reducing the multiprocessors' overall performance and task-handling efficiency. The main reason is the need to maintain coherency amongst multiprocessors' growing number of cores.This project aims to understand and study the performance of cache coherence protocols with increasing cores in multiprocessors. The study involves conducting experiments on commonly used cache coherence protocols, employing various workloads, and adjusting the number of cores.
author2 Weichen Liu
author_facet Weichen Liu
Lew, Kah Hoa
format Final Year Project
author Lew, Kah Hoa
author_sort Lew, Kah Hoa
title Cache coherence and network-on-chip (1)
title_short Cache coherence and network-on-chip (1)
title_full Cache coherence and network-on-chip (1)
title_fullStr Cache coherence and network-on-chip (1)
title_full_unstemmed Cache coherence and network-on-chip (1)
title_sort cache coherence and network-on-chip (1)
publisher Nanyang Technological University
publishDate 2024
url https://hdl.handle.net/10356/175332
_version_ 1800916431069511680