Low power resistive memory circuit design
Memory exists everywhere around us; digital memory lies in every single one of our electronic devices. With the increasing demand, the current standards of memories such as: Static RAM (SRAM), Dynamic RAM (DRAM, and Flash memory are slowly losing out in terms of performance and power requireme...
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Nanyang Technological University
2024
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sg-ntu-dr.10356-1767812024-05-24T15:42:55Z Low power resistive memory circuit design Chong, Chun Keat Kim Tae Hyoung School of Electrical and Electronic Engineering THKIM@ntu.edu.sg Engineering Memory Resistive Memory exists everywhere around us; digital memory lies in every single one of our electronic devices. With the increasing demand, the current standards of memories such as: Static RAM (SRAM), Dynamic RAM (DRAM, and Flash memory are slowly losing out in terms of performance and power requirement. Consequently, rise of emerging non-volatile memory is imminent, and out of all these new emerging technologies, Resistive RAM (ReRAM) stands out as the best option to replace Flash memory due to its high on-off ratio, fast read and write speed, high endurance and potential low power characteristics. This project aims to design a 32 by 32 ReRAM array and simulate its writing (SET, PRESET) and reading state while keeping it as low power usage as possible. Finally, a complete circuit is optimized to achieve low power consumption while successfully simulating the read and write process of the ReRAM. Bachelor's degree 2024-05-20T02:38:40Z 2024-05-20T02:38:40Z 2024 Final Year Project (FYP) Chong, C. K. (2024). Low power resistive memory circuit design. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/176781 https://hdl.handle.net/10356/176781 en A2325-231 application/pdf Nanyang Technological University |
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Engineering Memory Resistive |
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Engineering Memory Resistive Chong, Chun Keat Low power resistive memory circuit design |
| description |
Memory exists everywhere around us; digital memory lies in every single one of our
electronic devices. With the increasing demand, the current standards of memories
such as: Static RAM (SRAM), Dynamic RAM (DRAM, and Flash memory are slowly
losing out in terms of performance and power requirement. Consequently, rise of
emerging non-volatile memory is imminent, and out of all these new emerging
technologies, Resistive RAM (ReRAM) stands out as the best option to replace Flash
memory due to its high on-off ratio, fast read and write speed, high endurance and
potential low power characteristics. This project aims to design a 32 by 32 ReRAM
array and simulate its writing (SET, PRESET) and reading state while keeping it as
low power usage as possible. Finally, a complete circuit is optimized to achieve low
power consumption while successfully simulating the read and write process of the
ReRAM. |
| author2 |
Kim Tae Hyoung |
| author_facet |
Kim Tae Hyoung Chong, Chun Keat |
| format |
Final Year Project |
| author |
Chong, Chun Keat |
| author_sort |
Chong, Chun Keat |
| title |
Low power resistive memory circuit design |
| title_short |
Low power resistive memory circuit design |
| title_full |
Low power resistive memory circuit design |
| title_fullStr |
Low power resistive memory circuit design |
| title_full_unstemmed |
Low power resistive memory circuit design |
| title_sort |
low power resistive memory circuit design |
| publisher |
Nanyang Technological University |
| publishDate |
2024 |
| url |
https://hdl.handle.net/10356/176781 |
| _version_ |
1800916270107852800 |