Power management integrated circuit in audio and low power applications

• Main Author: Utomo, Nardi
• Other Authors: Siek Liter
• Format: Thesis-Doctor of Philosophy
• Language: English
• Published: Nanyang Technological University 2024
• Subjects: Engineering; Class H; Audio amplifier; Power management; Integrated circuit; LDO; Low power; Bootstrap; Output capacitorless; Power amplifier
• Online Access: https://hdl.handle.net/10356/177429
• Institution: Nanyang Technological University

In this thesis, 2 novel circuit designs are introduced by the author, one in the area of audio amplifier and another in the area of low-dropout regulator (LDO). In the area of audio amplifier, the author presents a novel class H audio amplifier design that can operate in full class H operating region, optimizing the efficiency of the class H audio amplifier architecture. Class H audio amplifier is a class AB audio amplifier, with supply voltage continuously tracking the output voltage, retaining the linearity and power supply rejection ratio (PSRR) performance of class AB amplifier, but at much higher efficiency. In prior works on class H audio amplifier, the supply-tracking capability has always been limited by the minimum supply requirement of its class AB amplifier. In the proposed class H audio amplifier, a novel class AB amplifier with all n-type output transistors and bootstrapping architecture is introduced to overcome this limitation. In addition, the proposed class H audio amplifier also features input amplitude detection (IAD) block that takes ac-coupled input, decoupling its operating point from the input voltage and also removing the need to sense the input common-mode voltage. The proposed class H audio amplifier is fabricated in GF 55nm BCDLite technology, consuming 2.01mm2 of chip area. It can deliver up to 186.8mW peak output power to 16Ω audio load, consuming 4.9mW of quiescent power. It achieves the lowest A-weighted THD+N of -82dB and -81.5dB at 1kHz and 20kHz, respectively. The proposed class H audio amplifier also achieves 85.1% peak power efficiency, the highest among prior work on class H audio amplifier. The proposed class H audio amplifier also shows significant efficiency improvement at low output power, making it highly suitable for audio applications with typically high crest factor (peak-to-average power ratio). In the area of low-dropout regulator, the author presents a novel low voltage, low power output-capacitorless low-dropout regulator (OCL-LDO) with embedded voltage reference (EVR) with adjustable and programmable output voltage. In prior works, there is an OCL-LDO with EVR design introduced by [1] that can generate low output voltage of 600mV with supply voltage as low as 650mV, while still achieving good line regulation, load regulation, temperature coefficient (TC), and transient response. The output voltage level, however, depends on the process and cannot be freely adjusted, limiting the applicability of the design. In this thesis, the author improves upon this work by introducing a new feedback network that allows the output voltage level of the architecture to be freely adjusted while keeping the TC low. In addition, the author also introduces the output programmability technique for the proposed output adjustability technique to generate multiple different output voltages for trimming purposes. The proposed low voltage, low power output-capacitorless low-dropout regulator (OCL-LDO) with embedded voltage reference (EVR) with adjustable and programmable output voltage is implemented and fabricated in GF 55nm BCDLite Technology. It can generate the desired output voltage of 440mV, 500mV, 550mV, and 600mV with minimum dropout voltage of 60mV. The proposed design consumes 0.0234mm2 of chip area and it consumes 33µA of quiescent current. Measurement results show that the line regulation is below 32.4mV/V, the load regulation is below 3.5mV/mA, and the TC is below 271ppm/°C under all different output voltage modes of the proposed OCL-LDO with EVR. The measurement also shows that the TCs of output voltage are relatively maintained at all output voltage modes of the proposed OCL-LDO. The proposed OCL-LDO also has fast transient recovery time of less than 1.1µs under all conditions.