Design of high-speed dynamic element matching DAC for multi-bit delta-sigma modulators

• Main Author: Wang, Gaopeng
• Other Authors: Tiew Kei Tee
• Format: Final Year Project
• Language: English
• Published: 2009
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Microelectronics; DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits; DRNTU::Engineering::Electrical and electronic engineering::Electronic systems; DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits; DRNTU::Engineering::Electrical and electronic engineering::Applications of electronics
• Online Access: http://hdl.handle.net/10356/17945
• Institution: Nanyang Technological University

This project examines various dynamic-element-matching algorithms to improve the performance of delta-sigma modulator’s multi-bit DAC due to non-idealities in circuit. Simulations at system level are performed to verify and compare the performance of those algorithms. Then one of the algorithms, data-weighted-averaging algorithm is discussed in detail and implemented at transistor-level in Cadence with the CSM018IC process. A new implementation approach for the DWA algorithm is developed and tested at circuit level. From the simulation, it is verified the designed DAC with DWA algorithm is workable at sampling frequency of 500MHz with satisfying improvement in performance compared to without DWA algorithm.