Design and analysis of passive phase shifters using controllable defected ground structures in 65nm CMOS technology for 77-81 GHz automotive radar

• Main Author: Wu, Jiaqi
• Other Authors: Zhang Yue Ping
• Format: Thesis-Doctor of Philosophy
• Language: English
• Published: Nanyang Technological University 2024
• Subjects: Engineering; Phase shifter; Defected ground structure; 79GHz automotive radar
• Online Access: https://hdl.handle.net/10356/181842
• Institution: Nanyang Technological University

Automotive radar sensor is identified as the most promising environmental perception sensor due to its low cost, small size, and reliability under all circumstances for Advanced Driver Assistance Systems (ADAS) that improves the safety and comfort of driving experience. The operating frequency band for automotive radar is now confirmed to be 76-77 GHz for Long Range Radar (LRR), and 77-81 GHz wideband to achieve higher resolution for Middle Range Radar (MRR) and Short Range Radar (SRR) applications. Phased array radar is a low cost and promising technique to achieve high angular resolution by scanning a narrow beam in azimuth. The key enabler of a phased array radar is the phase shifter, which provides a progressive phase difference in each channel to achieve beamforming. For automotive radar, phase shifters with small size, low cost, low power consumption, high phase resolution and high phase accuracy are required. Many phase shifter topologies have been demonstrated. Active phase shifters like vector summing type employing active devices consume large amount of power and the phase accuracy is normally low due to the active components. Analog phase shifters using varactors to continuously control the phase also provides a low accuracy and need Digital to Analog Convertors (DAC) to control the phase change from the baseband, which will further decrease the accuracy and lower the phased array scanning speed. In this research, a novel passive switched type phase shifter is designed by exploiting the slow-wave property of Defected Ground Structures (DGS). DGS was firstly applied in the design of low-pass filters, switches, antennas, and many other microwave circuits, using microstrip lines or coplanar waveguides. In the proposed structure, an NMOS switch is inserted between the gap of DGS to enable or disable DGS. By switching the states of DGS, the ground current path, hence, the inductance ( L ) associated with DGS are changed. Increased L decreases the transmission speed which leads to a phase delay. In this sense, DGS can be treated as a slow-wave artificial transmission line. A physical dimension related formula for DGS inductance calculation is proposed. To achieve large phase shift range and small phase resolution, multiple DGSs were cascaded longitudinally and transversally. Two phase shifters with phase shift range of 108° (Phase Shifter I) and 175° (Phase Shifter II) , phase resolution of 2° and 5° were designed and co-simulated in HFSS and Cadence Virtuoso. Phase Shifter I and Phase Shifter II were simulated to have a rms phase error of 0.53° and 2.02° respectively.xi The phase shifters were designed and fabricated in STM 65-nm CMOS process. The phase shifters occupy an active area of 0.112 mm2 and 0.158 mm2 . The fabricated phase shifters were measured from DC to 110 GHz using Cascade Probe Station. In the frequency band of 77 to 81 GHz, Phase Shifter I was measured to have a phase range of 83° with an average phase resolution of 1.54° and rms phase error of 1.473°; Phase Shifter II was measured to have a phase range of 104° with an average phase resolution of 2.96° and rms phase error of 4.793°. The measured results are largely different from simulations which were mainly caused by the great discrepancy between HFSS simulation models and real fabricated chips. The discrepancy between original simulation models and fabricated chips mainly comes from the dummy metal effects which were hard to model and simulate during the design stage. To address this problem, a detailed analysis process of the dummy metal effects on the RF characteristics was presented and a simplified EM (HFSS)-Circuit (Cadence Virtuoso) co-simulation model was proposed to accurately simulate the controllable DGS circuit fabricated in CMOS technology. A 10 10  aperture coupled planar antenna array in Fan-Out Wafer Level Packaging (FOWLP) was designed to be integrated with the phase shifters. Following -20 dB Taylor distribution, -20 dB sidelobe level was achieved for the planar array. The antenna array was simulated to have a Field of View (FoV) of 44° and angular resolution of 1.5° with the antenna gain in a range of 20.84 to 22.97 dB in 77 to 81 GHz.