An improved neutral point clamped multilevel converter

• Main Author: Ge, Jingyang
• Other Authors: Amer M. Y. M. Ghias
• Format: Thesis-Master by Coursework
• Language: English
• Published: Nanyang Technological University 2025
• Subjects: Engineering; Boost converter; NPC; PD-PWM
• Online Access: https://hdl.handle.net/10356/182724
• Institution: Nanyang Technological University

This thesis systematically studies the solution of combining the Boost circuit with the NPC inverter circuit to effectively reduce the THD of the output voltage and current and improve the overall performance of the system. In this thesis, the superiority and applicability of this combination scheme are comprehensively discussed by means of detailed theoretical analysis, topology optimization design, and Matlab/Simulink simulation verification. Research shows that the boost circuit can provide a much steadier input voltage source for an NPC inverter because its neutral point voltage clamp has great stability for the NPC circuit, thus greatly improving the output waveform quality of the inverter. The PD-PWM modulation strategy is employed, based on the optimized topology structure of the multi-level inverter NPC, which allows for the effective suppression of high-order harmonic components inside the system. The simulation results show that the proposed NPC solution has obvious advantages in harmonic suppression compared with the classical NPC. Among them, the THD of the output voltage is reduced from 3.08% of the classical NPC inverter to 2.38%, and the THD of the current is reduced from 5.28% to 2.62%, which are reduced by approximately 0.7% and 2.66% respectively. Meanwhile, comparing the voltage THD ratio of the proposed NPC inverter to the classical NPC inverter across all modulation indices and voltage phase angles, the THD ratio remains less than 1 across all modulation indices, indicating that the proposed NPC consistently achieves lower voltage THD values than the classical NPC. This demonstrates the superiority of the proposed NPC inverter in terms of output voltage quality. It improves not only the quality of the output waveform significantly but also reduces the additional losses caused by harmonics, further improving the efficiency of the system and load performance. Furthermore, the findings confirm that the proposed inverter significantly outperforms the classical design in terms of harmonic suppression and waveform quality, contributing to improved system performance and reliability. The Boost-NPC combined scheme proposed in this thesis has a high application potential in many high-performance applications, such as low-harmonic and high-quality voltage demands of photovoltaic grid-connected power generation systems, high-power industrial motor drives with efficiency and reliability requirements, and strict waveform quality control of high-precision power converters. The research results provide an effective solution for the design of high-quality power conversion systems and lay a theoretical foundation and practical basis for further optimizing multi-level inverter topology and control strategies. Further research will expand the experimental verification of this solution under complex load conditions and further optimize dynamic performance and application adaptability in combination with modern intelligent control technology.