Class D amplifier based on random modulation technique
This dissertation presents the design of a Class-D Amplifier with a randomly modulated clock to minimize electromagnetic interference. The clock frequency varies between 110 kHz and 3(X) kHz and the depth of variation is proportional to the input signal to maintain a good SNR when input signal is lo...
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| Format: | Theses and Dissertations |
| Language: | English |
| Published: |
2009
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| Online Access: | http://hdl.handle.net/10356/18790 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | This dissertation presents the design of a Class-D Amplifier with a randomly modulated clock to minimize electromagnetic interference. The clock frequency varies between 110 kHz and 3(X) kHz and the depth of variation is proportional to the input signal to maintain a good SNR when input signal is low. Besides random clock modulation, frequency modulation has also been introduced to improve the efficiency. The proposed technique will minimize the common-mode interference in the two speaker’s wires of a filterless Class D amplifier so that the switching amplifier can pass the international standards such as the FCC Class B limits. The proposed design also exhibits better efficiency at low input signal. The circuit can operate between a supply voltage of 2.5V and 4V using the 0.35um CMOS process. |
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