Design of a low-voltage input-output rail-to-rail CMOS buffer

Scaling of modern integrated circuit (IC) technologies as well as the increasing important of battery and solar powered system, demand more and more circuit to be able to operate at very low supply voltage environments. The most important basic building block in analog and mixed-mode circuits is th...

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Main Author: Pua, Poo Toong.
Other Authors: Siek Liter
Format: Theses and Dissertations
Language:English
Published: 2009
Subjects:
Online Access:http://hdl.handle.net/10356/18801
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-188012023-07-04T15:21:30Z Design of a low-voltage input-output rail-to-rail CMOS buffer Pua, Poo Toong. Siek Liter School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits Scaling of modern integrated circuit (IC) technologies as well as the increasing important of battery and solar powered system, demand more and more circuit to be able to operate at very low supply voltage environments. The most important basic building block in analog and mixed-mode circuits is the operational amplifier and buffer. In this report, a low voltage quasi rail-to-rail opamp input is introduced. A common-mode adapter that uses the common-mode voltage present at the common-source node of the available differential pair to accommodate the large common-mode input signal is proposed. The output stage of buffer uses a rail-to-rail class-AB with simple folded mesh feedback control without any resistors. The design of the buffer in this project is based on AMIS 0.5μm CMOS technology. The finalized buffer operates at 1.5V supply voltage and allows rail-to-rail input and output swings. Master of Science (Integrated Circuit Design) 2009-07-20T02:15:54Z 2009-07-20T02:15:54Z 2008 2008 Thesis http://hdl.handle.net/10356/18801 en 77 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Pua, Poo Toong.
Design of a low-voltage input-output rail-to-rail CMOS buffer
description Scaling of modern integrated circuit (IC) technologies as well as the increasing important of battery and solar powered system, demand more and more circuit to be able to operate at very low supply voltage environments. The most important basic building block in analog and mixed-mode circuits is the operational amplifier and buffer. In this report, a low voltage quasi rail-to-rail opamp input is introduced. A common-mode adapter that uses the common-mode voltage present at the common-source node of the available differential pair to accommodate the large common-mode input signal is proposed. The output stage of buffer uses a rail-to-rail class-AB with simple folded mesh feedback control without any resistors. The design of the buffer in this project is based on AMIS 0.5μm CMOS technology. The finalized buffer operates at 1.5V supply voltage and allows rail-to-rail input and output swings.
author2 Siek Liter
author_facet Siek Liter
Pua, Poo Toong.
format Theses and Dissertations
author Pua, Poo Toong.
author_sort Pua, Poo Toong.
title Design of a low-voltage input-output rail-to-rail CMOS buffer
title_short Design of a low-voltage input-output rail-to-rail CMOS buffer
title_full Design of a low-voltage input-output rail-to-rail CMOS buffer
title_fullStr Design of a low-voltage input-output rail-to-rail CMOS buffer
title_full_unstemmed Design of a low-voltage input-output rail-to-rail CMOS buffer
title_sort design of a low-voltage input-output rail-to-rail cmos buffer
publishDate 2009
url http://hdl.handle.net/10356/18801
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