Design and implementation of sigma delta analog-to-digital converter

• المؤلف الرئيسي: Ong, Chee Kian.
• مؤلفون آخرون: Ng, Lian Soon
• التنسيق: Theses and Dissertations
• اللغة: English
• منشور في: 2009
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/19550
• المؤسسة: Nanyang Technological University

Oversampling Analog-to-Digital Converter based on high-order sigma-delta modulation provides an effective means of achieving high-resolution analog-to-digital conversion in VLSI technology. Its high-order noise shaping reduces the quantization noise in the signal band. This thesis includes the formulation of the equation for the minimum amplitude requirement of the first-order sigma delta modulator. This formula can predict the minimum amplitude of a sinewave required for the successful operation of a first-order modulator. The non-linear characteristic of the first-order modulator's noise is observed in conjunction with the finding of the minimum amplitude requirement. The non-linear characteristic of the first-order modulator's noise causes a cleft on the SNR graph of a multistage modulator when the implemented gains value of the modulator differ from the designed gains value. This has greatly affected the choice of architectures for implementation.