Multichannel processing element simulation for neural networks applications

• Main Author: Cao, En
• Other Authors: Chan, Choong Wah
• Format: Theses and Dissertations
• Language: English
• Published: 2009
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: http://hdl.handle.net/10356/19753
• Institution: Nanyang Technological University

In recent years, hardware implementation of neural networks has received increasing attention from researchers. Various techniques for implementation have been used, such as analog, digital and a hybrid of both. This thesis describes the design and simulation of a digital hardware processing element. It focuses on the implementation of digital neural hardware based on bit-serial transmission and information processing which is known as the Pulse-Stream Implementation (PSI). Stochastic computing is an important PSI technique, and currently two techniques of stochastic computing are in use; they are binary stochastic computing (BSC) and pulse density modulation (PDM). As a model of neural hardware, the mapping network for modelling of freeform surfaces is discussed in geometrical terms.