A unified architecture for flat CORDIC

• Main Author: Bimal Gisuthan.
• Other Authors: Srikanthan, T.
• Format: Theses and Dissertations
• Published: 2008
• Subjects: DRNTU::Engineering::Computer science and engineering::Computer systems organization::Computer-communication networks
• Online Access: http://hdl.handle.net/10356/2346
• Institution: Nanyang Technological University

The significant advances in VLSI technology provided the impetus for porting algorithms into architectures. The CORDIC algorithm reigned supreme in this regard due to its canny ability to decimate trigonometric and hyperbolic functions with simple shift and add operations. Despite further refinements of the algorithm with the introduction of redundant arithmetic and higher radix CORDIC techniques, in terms of circuit latency and performance, the iterative nature remains to be the major bottleneck for further optimization. Although several techniques have been proposed to minimize this drawback, a technique known as flat CORDIC aims to eliminate it completely. In flat CORDIC, the conventional X and Y recurrences are successively substituted to express the final vectors in terms of the initial vectors.