Circuit performance and sensitivity analysis of CMOS phase detectors

In this dissertation, three low-power low-voltage designs of CMOS phase detectors for Synchronous Optical Netwrok (SONET) Optical Carrier (OC) -192 applications at the data rate of 10 Gbps are presented. All the simulations are based on Chartered Semiconductor Manufacturing Ltd. (CSM) 0.18\wi RF CMO...

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Main Author: Soe Moe.
Other Authors: Yeo, Kiat Seng
Format: Theses and Dissertations
Published: 2008
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Online Access:http://hdl.handle.net/10356/3266
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Institution: Nanyang Technological University
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spelling sg-ntu-dr.10356-32662023-07-04T15:51:35Z Circuit performance and sensitivity analysis of CMOS phase detectors Soe Moe. Yeo, Kiat Seng School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits In this dissertation, three low-power low-voltage designs of CMOS phase detectors for Synchronous Optical Netwrok (SONET) Optical Carrier (OC) -192 applications at the data rate of 10 Gbps are presented. All the simulations are based on Chartered Semiconductor Manufacturing Ltd. (CSM) 0.18\wi RF CMOS process. The performances of three different types of CMOS phase detectors are simulated using Spectre Simulator with Analog Artist Interface of Cadence Design Software 4.4.6. Master of Science (Consumer Electronics) 2008-09-17T09:25:56Z 2008-09-17T09:25:56Z 2004 2004 Thesis http://hdl.handle.net/10356/3266 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Soe Moe.
Circuit performance and sensitivity analysis of CMOS phase detectors
description In this dissertation, three low-power low-voltage designs of CMOS phase detectors for Synchronous Optical Netwrok (SONET) Optical Carrier (OC) -192 applications at the data rate of 10 Gbps are presented. All the simulations are based on Chartered Semiconductor Manufacturing Ltd. (CSM) 0.18\wi RF CMOS process. The performances of three different types of CMOS phase detectors are simulated using Spectre Simulator with Analog Artist Interface of Cadence Design Software 4.4.6.
author2 Yeo, Kiat Seng
author_facet Yeo, Kiat Seng
Soe Moe.
format Theses and Dissertations
author Soe Moe.
author_sort Soe Moe.
title Circuit performance and sensitivity analysis of CMOS phase detectors
title_short Circuit performance and sensitivity analysis of CMOS phase detectors
title_full Circuit performance and sensitivity analysis of CMOS phase detectors
title_fullStr Circuit performance and sensitivity analysis of CMOS phase detectors
title_full_unstemmed Circuit performance and sensitivity analysis of CMOS phase detectors
title_sort circuit performance and sensitivity analysis of cmos phase detectors
publishDate 2008
url http://hdl.handle.net/10356/3266
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