Adiabatic CMOS circuits

In this dissertation, we present two novel energy recovery families: Dual Improved Adiabatic Pseudo-Domino Logic Family (DIAPDL) and Modified Dual Improved Adiabatic Pseudo-Domino Logic Family (MDIAPDL). They are based on partially-adiabatic designs that are simple and readily cascadable. They can b...

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Main Author: Tan, Whee Min.
Other Authors: Lau, K. T.
Format: Theses and Dissertations
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/3401
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Institution: Nanyang Technological University
id sg-ntu-dr.10356-3401
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spelling sg-ntu-dr.10356-34012023-07-04T15:06:26Z Adiabatic CMOS circuits Tan, Whee Min. Lau, K. T. School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Semiconductors In this dissertation, we present two novel energy recovery families: Dual Improved Adiabatic Pseudo-Domino Logic Family (DIAPDL) and Modified Dual Improved Adiabatic Pseudo-Domino Logic Family (MDIAPDL). They are based on partially-adiabatic designs that are simple and readily cascadable. They can be designed with two-phase clocking schemes for the design of 4-bit shift registers and 1-bit adder. Master of Science (Consumer Electronics) 2008-09-17T09:29:22Z 2008-09-17T09:29:22Z 2002 2002 Thesis http://hdl.handle.net/10356/3401 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Semiconductors
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Semiconductors
Tan, Whee Min.
Adiabatic CMOS circuits
description In this dissertation, we present two novel energy recovery families: Dual Improved Adiabatic Pseudo-Domino Logic Family (DIAPDL) and Modified Dual Improved Adiabatic Pseudo-Domino Logic Family (MDIAPDL). They are based on partially-adiabatic designs that are simple and readily cascadable. They can be designed with two-phase clocking schemes for the design of 4-bit shift registers and 1-bit adder.
author2 Lau, K. T.
author_facet Lau, K. T.
Tan, Whee Min.
format Theses and Dissertations
author Tan, Whee Min.
author_sort Tan, Whee Min.
title Adiabatic CMOS circuits
title_short Adiabatic CMOS circuits
title_full Adiabatic CMOS circuits
title_fullStr Adiabatic CMOS circuits
title_full_unstemmed Adiabatic CMOS circuits
title_sort adiabatic cmos circuits
publishDate 2008
url http://hdl.handle.net/10356/3401
_version_ 1772825345099038720