Integrated platform for design and verification of digital FIR filters

Integrated platform for design and verification of digital FIR filters

This work aimed at creating a unified platform to automate the generation of VHDL codes for the physical synthesis of FIR filters in both direct and transposed direct form filters. The aim was to provide designers and researchers with a tool to analyze the physical performances of different filter s...

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Bibliographic Details
Main Author: Sharma Udit
Other Authors: Jong Ching Chuen
Format: Theses and Dissertations
Published: 2008
Subjects:
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Online Access:https://hdl.handle.net/10356/3520
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Institution: Nanyang Technological University
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spelling sg-ntu-dr.10356-35202023-07-04T16:56:46Z Integrated platform for design and verification of digital FIR filters Sharma Udit Jong Ching Chuen School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits This work aimed at creating a unified platform to automate the generation of VHDL codes for the physical synthesis of FIR filters in both direct and transposed direct form filters. The aim was to provide designers and researchers with a tool to analyze the physical performances of different filter solutions in terms of VLSI area, delay and power consumption. Many benchmark filters were collected for such evaluation. This platform also performs a functional verification of the VHDL codes by running parallel simulations in a simulator and comparing the final output with its own response to randomly generated stimuli, thereby avoiding manual supervision. MASTER OF ENGINEERING (EEE) 2008-09-17T09:31:32Z 2008-09-17T09:31:32Z 2007 2007 Thesis Sharma, U. (2007). Integrated platform for design and verification of digital FIR filters. Master’s thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/3520 10.32657/10356/3520 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Sharma Udit
Integrated platform for design and verification of digital FIR filters
description This work aimed at creating a unified platform to automate the generation of VHDL codes for the physical synthesis of FIR filters in both direct and transposed direct form filters. The aim was to provide designers and researchers with a tool to analyze the physical performances of different filter solutions in terms of VLSI area, delay and power consumption. Many benchmark filters were collected for such evaluation. This platform also performs a functional verification of the VHDL codes by running parallel simulations in a simulator and comparing the final output with its own response to randomly generated stimuli, thereby avoiding manual supervision.
author2 Jong Ching Chuen
author_facet Jong Ching Chuen
Sharma Udit
format Theses and Dissertations
author Sharma Udit
author_sort Sharma Udit
title Integrated platform for design and verification of digital FIR filters
title_short Integrated platform for design and verification of digital FIR filters
title_full Integrated platform for design and verification of digital FIR filters
title_fullStr Integrated platform for design and verification of digital FIR filters
title_full_unstemmed Integrated platform for design and verification of digital FIR filters
title_sort integrated platform for design and verification of digital fir filters
publishDate 2008
url https://hdl.handle.net/10356/3520
_version_ 1772825421728972800

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