Timing analysis of interconnect networks
195 p.
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2010
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| Online Access: | https://hdl.handle.net/10356/35722 |
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| Institution: | Nanyang Technological University |
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sg-ntu-dr.10356-357222023-03-04T00:46:29Z Timing analysis of interconnect networks Cao, Yi Tan Eng Chong School of Computer Engineering DRNTU::Engineering::Computer science and engineering::Computer systems organization::Computer-communication networks 195 p. Timing analysis of high-order networks has been an important issue in system study. The delay is one of the important parameters to characterize a system and can be obtained from the transfer function of the system. With smaller feature sizes and increasing clock frequencies of today's semiconductor technology, interconnections between logic gates may actually be the dominant contributors of delay. In addition, interconnect effects such as ringing, reflection, crosstalk, dispersion and attenuation may corrupt logic signals and degrade system performance. These effects are not always handled appropriately, accurately or efficiently by the present levels of circuit simulators. DOCTOR OF PHILOSOPHY (SCE) 2010-04-23T01:30:43Z 2010-04-23T01:30:43Z 2006 2006 Thesis Cao, Y. (2006). Timing analysis of interconnect networks. Doctoral thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/35722 10.32657/10356/35722 application/pdf |
| institution |
Nanyang Technological University |
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NTU Library |
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Asia |
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Singapore Singapore |
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NTU Library |
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| topic |
DRNTU::Engineering::Computer science and engineering::Computer systems organization::Computer-communication networks |
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DRNTU::Engineering::Computer science and engineering::Computer systems organization::Computer-communication networks Cao, Yi Timing analysis of interconnect networks |
| description |
195 p. |
| author2 |
Tan Eng Chong |
| author_facet |
Tan Eng Chong Cao, Yi |
| format |
Theses and Dissertations |
| author |
Cao, Yi |
| author_sort |
Cao, Yi |
| title |
Timing analysis of interconnect networks |
| title_short |
Timing analysis of interconnect networks |
| title_full |
Timing analysis of interconnect networks |
| title_fullStr |
Timing analysis of interconnect networks |
| title_full_unstemmed |
Timing analysis of interconnect networks |
| title_sort |
timing analysis of interconnect networks |
| publishDate |
2010 |
| url |
https://hdl.handle.net/10356/35722 |
| _version_ |
1759855327328600064 |