Design of a low-voltage input-output rail-to-rail CMOS buffer

The objective of this project is to design a buffer, which is able to work below a supply of 1.5 V typical and remain in operation even at 1.2 V or lower in the worst case for use in bond pad designs.

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Bibliographic Details
Main Author: Yang, Wenjie
Other Authors: Siek, Liter
Format: Theses and Dissertations
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/3845
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Institution: Nanyang Technological University
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spelling sg-ntu-dr.10356-38452023-07-04T15:25:09Z Design of a low-voltage input-output rail-to-rail CMOS buffer Yang, Wenjie Siek, Liter School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits The objective of this project is to design a buffer, which is able to work below a supply of 1.5 V typical and remain in operation even at 1.2 V or lower in the worst case for use in bond pad designs. Master of Science (Integrated Circuit Design) 2008-09-17T09:38:51Z 2008-09-17T09:38:51Z 2006 2006 Thesis http://hdl.handle.net/10356/3845 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Yang, Wenjie
Design of a low-voltage input-output rail-to-rail CMOS buffer
description The objective of this project is to design a buffer, which is able to work below a supply of 1.5 V typical and remain in operation even at 1.2 V or lower in the worst case for use in bond pad designs.
author2 Siek, Liter
author_facet Siek, Liter
Yang, Wenjie
format Theses and Dissertations
author Yang, Wenjie
author_sort Yang, Wenjie
title Design of a low-voltage input-output rail-to-rail CMOS buffer
title_short Design of a low-voltage input-output rail-to-rail CMOS buffer
title_full Design of a low-voltage input-output rail-to-rail CMOS buffer
title_fullStr Design of a low-voltage input-output rail-to-rail CMOS buffer
title_full_unstemmed Design of a low-voltage input-output rail-to-rail CMOS buffer
title_sort design of a low-voltage input-output rail-to-rail cmos buffer
publishDate 2008
url http://hdl.handle.net/10356/3845
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