Analysis and implementation of backpropagation neural networks on heterogeneous processor arrays
This study focuses on the parallel implementations of backpropagation (BP) neural net-works on a heterogeneous array of processors. A theoretical model of the BP algorithm running on the processor network was developed for training set parallelism and using this model the time for a training epoch w...
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sg-ntu-dr.10356-389782023-07-04T15:29:53Z Analysis and implementation of backpropagation neural networks on heterogeneous processor arrays Foo, Shou King. Paramasivan, Saratchandran School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Power electronics This study focuses on the parallel implementations of backpropagation (BP) neural net-works on a heterogeneous array of processors. A theoretical model of the BP algorithm running on the processor network was developed for training set parallelism and using this model the time for a training epoch was predicted. The model made use of two graphical tools, process synchronization graphs and variable synchronization graphs, to aid in obtaining the theoretical expression for the time for a training epoch. The theoretically predicted epoch times from the model were then experimentally validated on well known benchmark problems. Doctor of Philosophy (EEE) 2010-05-21T03:38:23Z 2010-05-21T03:38:23Z 1997 1997 Thesis http://hdl.handle.net/10356/38978 NANYANG TECHNOLOGICAL UNIVERSITY 287 p. application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering::Power electronics Foo, Shou King. Analysis and implementation of backpropagation neural networks on heterogeneous processor arrays |
| description |
This study focuses on the parallel implementations of backpropagation (BP) neural net-works on a heterogeneous array of processors. A theoretical model of the BP algorithm running on the processor network was developed for training set parallelism and using this model the time for a training epoch was predicted. The model made use of two graphical tools, process synchronization graphs and variable synchronization graphs, to aid in obtaining the theoretical expression for the time for a training epoch. The theoretically predicted epoch times from the model were then experimentally validated on well known benchmark problems. |
| author2 |
Paramasivan, Saratchandran |
| author_facet |
Paramasivan, Saratchandran Foo, Shou King. |
| format |
Theses and Dissertations |
| author |
Foo, Shou King. |
| author_sort |
Foo, Shou King. |
| title |
Analysis and implementation of backpropagation neural networks on heterogeneous processor arrays |
| title_short |
Analysis and implementation of backpropagation neural networks on heterogeneous processor arrays |
| title_full |
Analysis and implementation of backpropagation neural networks on heterogeneous processor arrays |
| title_fullStr |
Analysis and implementation of backpropagation neural networks on heterogeneous processor arrays |
| title_full_unstemmed |
Analysis and implementation of backpropagation neural networks on heterogeneous processor arrays |
| title_sort |
analysis and implementation of backpropagation neural networks on heterogeneous processor arrays |
| publishDate |
2010 |
| url |
http://hdl.handle.net/10356/38978 |
| _version_ |
1772828395811373056 |