High-speed CMOS pipelined subranging ADC
206 p.
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2010
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| Online Access: | https://hdl.handle.net/10356/39087 |
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sg-ntu-dr.10356-390872023-07-04T17:04:34Z High-speed CMOS pipelined subranging ADC Fan, Xianping Chan Pak Kwong School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering 206 p. This dissertation presents a new 10-bit subranging analog-to-digital converter (ADC) dedicated for high-speed low-power application. The proposed architecture includes one coarse ADC plus two interleaved fine ADCs incorporating with pipeline and doubling sampling techniques. Contrasting to conventional subranging architectures, the system maximizes the throughput via elimination of extra idle time and eliminates a sample-andhold (S/H) circuit. Besides, a new sliding feedback capacitor technique, using time constant reduction concept, is proposed to enhance the speed of coarse ADC. A synchronized switch is introduced to minimize the sample-time mismatches so as to reduce nonlinearity arising from interleaving action. Other well-established circuit techniques like bottom-plate sampling, distributed sampling, autozeroing, and interpolation are employed for complete ADC design. DOCTOR OF PHILOSOPHY (EEE) 2010-05-21T04:40:37Z 2010-05-21T04:40:37Z 2006 2006 Thesis Fan, X. (2006). High-speed CMOS pipelined subranging ADC. Doctoral thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/39087 10.32657/10356/39087 application/pdf |
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Singapore Singapore |
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DRNTU::Engineering::Electrical and electronic engineering |
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DRNTU::Engineering::Electrical and electronic engineering Fan, Xianping High-speed CMOS pipelined subranging ADC |
| description |
206 p. |
| author2 |
Chan Pak Kwong |
| author_facet |
Chan Pak Kwong Fan, Xianping |
| format |
Theses and Dissertations |
| author |
Fan, Xianping |
| author_sort |
Fan, Xianping |
| title |
High-speed CMOS pipelined subranging ADC |
| title_short |
High-speed CMOS pipelined subranging ADC |
| title_full |
High-speed CMOS pipelined subranging ADC |
| title_fullStr |
High-speed CMOS pipelined subranging ADC |
| title_full_unstemmed |
High-speed CMOS pipelined subranging ADC |
| title_sort |
high-speed cmos pipelined subranging adc |
| publishDate |
2010 |
| url |
https://hdl.handle.net/10356/39087 |
| _version_ |
1772827135116836864 |