Investigations of the dielectric-semiconductor interface and bulk dielectric effects on charge transport in high performance organic field effect transistors on flexible substrates

• Main Author: Tan, Huei Shuan
• Other Authors: Zhu Furong
• Format: Theses and Dissertations
• Language: English
• Published: 2010
• Subjects: DRNTU::Engineering::Materials
• Online Access: https://hdl.handle.net/10356/40180
• Institution: Nanyang Technological University

Organic field-effect transistors (OFETs) exhibiting high mobilities and low-operating voltages is key for their successful realization in plastic electronics applications. It has become increasingly evident that the dielectric and dielectric-semiconductor interface is of critical importance to OFETs’ device performance, influencing mobility, low voltage operation and output currents. This thesis reports on the concept of introducing high k silica films prepared via a sol-gel (SG) methodology as potential gate dielectrics that enable high performance OFETs on plastic substrates. Compared to OFETs fabricated on thermal oxide (SiO2) and SiNx, an improved device characteristic is distinctively and consistently observed in OFETs fabricated on sol-gel silica dielectric. In particular, through the innovative approach of tri-layer sol-gel silica gate dielectric architecture, both Pentacene and P3HT FETs with gate bias of ≤ –5 V, demonstrated saturation mobilities of ~6.55cm2/Vs,~ 0.5cm2/Vs respectively with current on-off ratio of > 105 on plastic substrates. X-Ray diffraction, photoluminescence/absorption, Raman spectroscopy and near edge X-ray absorption fine studies display enhanced molecular ordering and packing through a more homogeneous and better in-phase intermolecular coupling in the pentacene organic semiconductor deposited on sol-gel silica. This phenomenon is induced by the excellent surface properties of sol-gel silica (Roughness of < 0.3nm and low surface energy) promoting lesser structural defects at the dielectric-semiconductor interface. These studies provide consistent proof that dielectric-semiconductor interface, film morphology and structural defects are the determining factors which impact charge carrier mobility, threshold voltage and other figures of merit of OFETs. One of the phenomenon studied using this sol-gel silica system is the effect of dielectric constant on charge carrier mobilities. By varying the duration of argon or air plasma and thus modulating the polar –OH groups in the dielectric bulk, the k of the tri-layer SG silica was tuned from ~7 to ~9. This acts as a platform to study the effect of high bulk dielectric constant (high k) on device performance while preserving a similar dielectric surface energy and chemistry. Both Pentacene and P3HT FETs showed lower mobilities with increasing k, demonstrating that the charge transport in OFETs could be limited by the high polarizability of the gate dielectric that leads to energetic disorder at the dielectric – semiconductor interface.