Design of low voltage micropower asynchronous datapath modules for a multiplierless FIR filter
In this dissertation, we propose three novel low power 16-bit circuit modules for the datapath of an FIR filter: (i) Multiplierless-based Multiplier, (ii) 2's-Complement-In-Sign-Magnitude-Out Adder, and (iii) Latch Accumulator.
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| 格式: | Theses and Dissertations |
| 出版: |
2008
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| 在線閱讀: | http://hdl.handle.net/10356/4174 |
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| 機構: | Nanyang Technological University |
| 總結: | In this dissertation, we propose three novel low power 16-bit circuit modules for the datapath of an FIR filter: (i) Multiplierless-based Multiplier, (ii) 2's-Complement-In-Sign-Magnitude-Out Adder, and (iii) Latch Accumulator. |
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