Design of low voltage micropower asynchronous datapath modules for a multiplierless FIR filter

Design of low voltage micropower asynchronous datapath modules for a multiplierless FIR filter

In this dissertation, we propose three novel low power 16-bit circuit modules for the datapath of an FIR filter: (i) Multiplierless-based Multiplier, (ii) 2's-Complement-In-Sign-Magnitude-Out Adder, and (iii) Latch Accumulator.

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書目詳細資料
主要作者:	Chua, Chien Chung.
其他作者:	Gwee, Bah Hwee
格式:	Theses and Dissertations
出版:	2008
主題:	DRNTU::Engineering::Electrical and electronic engineering::Electronic systems
在線閱讀:	http://hdl.handle.net/10356/4174
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

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