Design of a low-voltage CMOS rail-to-rail op amp

The aim of this project is to design a low-voltage rail-to-rail fully differential operational amplifier. The application of such a circuit is for portable electronic devices, which make use of only one battery cell. The circuit will be designed and simulated using a series of Mentor Graphics sof...

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Main Author: Guo, Dianbo.
Other Authors: Siek, Liter
Format: Theses and Dissertations
Published: 2008
Subjects:
Online Access:http://hdl.handle.net/10356/4318
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Institution: Nanyang Technological University
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spelling sg-ntu-dr.10356-43182023-07-04T15:14:16Z Design of a low-voltage CMOS rail-to-rail op amp Guo, Dianbo. Siek, Liter School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits The aim of this project is to design a low-voltage rail-to-rail fully differential operational amplifier. The application of such a circuit is for portable electronic devices, which make use of only one battery cell. The circuit will be designed and simulated using a series of Mentor Graphics software. The process used is 0.6um single P-well CMOS process of Austria Mikro Systeme International (AMS). Master of Science (Integrated Circuit Design) 2008-09-17T09:49:12Z 2008-09-17T09:49:12Z 2005 2005 Thesis http://hdl.handle.net/10356/4318 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Guo, Dianbo.
Design of a low-voltage CMOS rail-to-rail op amp
description The aim of this project is to design a low-voltage rail-to-rail fully differential operational amplifier. The application of such a circuit is for portable electronic devices, which make use of only one battery cell. The circuit will be designed and simulated using a series of Mentor Graphics software. The process used is 0.6um single P-well CMOS process of Austria Mikro Systeme International (AMS).
author2 Siek, Liter
author_facet Siek, Liter
Guo, Dianbo.
format Theses and Dissertations
author Guo, Dianbo.
author_sort Guo, Dianbo.
title Design of a low-voltage CMOS rail-to-rail op amp
title_short Design of a low-voltage CMOS rail-to-rail op amp
title_full Design of a low-voltage CMOS rail-to-rail op amp
title_fullStr Design of a low-voltage CMOS rail-to-rail op amp
title_full_unstemmed Design of a low-voltage CMOS rail-to-rail op amp
title_sort design of a low-voltage cmos rail-to-rail op amp
publishDate 2008
url http://hdl.handle.net/10356/4318
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