High frequency noise in deep-submicrometer silicon mosfets
The continuous downscaling of device feature size makes CMOS technology an attractive alternative for RF circuits because of its low cost, low power, and high integration capability. However, when working at high frequencies, the noise generated within CMOS device itself plays an increasingly import...
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| Format: | Theses and Dissertations |
| Language: | English |
| Published: |
2011
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| Online Access: | https://hdl.handle.net/10356/45285 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | The continuous downscaling of device feature size makes CMOS technology an attractive alternative for RF circuits because of its low cost, low power, and high integration capability. However, when working at high frequencies, the noise generated within CMOS device itself plays an increasingly important role in the overall noise performance of analog circuits. In this work, different aspects of high frequency noise characteristics of deep sub-micrometer MOSFETs are investigated. We analyzed the hot carrier induced interface damage and its spatial location (either at source- or drain-side) on high frequency noise in 0.18 μm NMOSFET. It was found that device noise degraded more significantly if the damage is localized at source than that at drain side. The difference is caused by larger impendence field presents near the source junction. This experimental results provide direct evidence that source side plays a more dominant role in determining the overall noise performance in short-channel MOSFETs. |
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