Asynchronous-logic 8051 microcontroller and circuits : dynamic voltage control

• 主要作者: Chang, Kok Leong.
• 其他作者: Gwee Bah Hwee
• 格式: Theses and Dissertations
• 語言: English
• 出版: 2011
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• 在線閱讀: http://hdl.handle.net/10356/45502
• 機構: Nanyang Technological University

This thesis pertains to digital-logic design methodologies/approaches that yield robust error-free energy-efficient digital-logic circuits/systems for full-range Dynamic Voltage Control (DVC), including at wide operation and variation spaces. The first part pertains to an investigation and design (including realization thereof) of a synchronous-logic 8051 microcontroller core and a proposed asynchronous-logic 8051 microcontroller core for full-range DVC and at wide operation and variation spaces. A salient aspect of said first part is the embodiment of standard library cells for sake of equitable benchmarking with the synchronous-logic counterpart – such cells are not optimized for asynchronous-logic Quasi-Delay-Insensitive realization. Hence, the second part pertains to the proposal of an asynchronous-logic Quasi-Delay-Insensitive realization approach for full-range DVC and at wide operation and variation spaces. The investigations and design proposals presented in this thesis are useful as they provide digital-logic circuit/system IC designers useful insight into the basis of selecting the appropriate digital-logic design philosophies/approaches that yield robust error-free operation for full-range DVC and at wide operation and variation spaces.