Design and implementation of power-efficient class D output stage

The purpose of this project was to study and design the output stage of a class D amplifier with incomplete feedback network.

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Bibliographic Details
Main Author: Gai, Hengwen
Other Authors: Tan Meng Tong
Format: Final Year Project
Language:English
Published: 2011
Subjects:
Online Access:http://hdl.handle.net/10356/45877
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-458772023-07-07T17:54:57Z Design and implementation of power-efficient class D output stage Gai, Hengwen Tan Meng Tong School of Electrical and Electronic Engineering Zheng Yuanjin DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits The purpose of this project was to study and design the output stage of a class D amplifier with incomplete feedback network. Bachelor of Engineering 2011-06-22T09:21:21Z 2011-06-22T09:21:21Z 2011 2011 Final Year Project (FYP) http://hdl.handle.net/10356/45877 en Nanyang Technological University 49 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Gai, Hengwen
Design and implementation of power-efficient class D output stage
description The purpose of this project was to study and design the output stage of a class D amplifier with incomplete feedback network.
author2 Tan Meng Tong
author_facet Tan Meng Tong
Gai, Hengwen
format Final Year Project
author Gai, Hengwen
author_sort Gai, Hengwen
title Design and implementation of power-efficient class D output stage
title_short Design and implementation of power-efficient class D output stage
title_full Design and implementation of power-efficient class D output stage
title_fullStr Design and implementation of power-efficient class D output stage
title_full_unstemmed Design and implementation of power-efficient class D output stage
title_sort design and implementation of power-efficient class d output stage
publishDate 2011
url http://hdl.handle.net/10356/45877
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