Analysis and synthesis of millimeter-wave low noise amplifier in 65-nm CMOS

• Main Author: Zeng, Yunjia
• Other Authors: Zhang Yue Ping
• Format: Final Year Project
• Language: English
• Published: 2011
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• Online Access: http://hdl.handle.net/10356/46074
• Institution: Nanyang Technological University

The abundance of the widely available spectrum surrounding 60 GHz operating frequency has promising applications in high-rate unlicensed wireless communications. One of the key building blocks in such wireless communication systems is low noise amplifier (LNA). The millimeter wave LNA is utilized in wireless communication system to amplify the weak signal which is captured by the receiver antenna. Modern CMOS technology provides viable solutions that are cost effective for the RF circuits with required performance. The scaling of the CMOS technology provides the opportunity to design CMOS LNA at millimeter wave frequencies. In this report, detailed analysis and synthesis are given on the design of 60 GHz LNA for millimeter wave receiver. In order to design the optimum LNA at 60 GHz, there are several important parameters to be considered, and proper design techniques and suitable topologies need to be adopted. The report includes a comprehensive review on the design specifications of 60 GHz LNA and summarizes the design methodology in full details. Different design techniques and circuit topologies are applied to construct 60 GHz LNA circuits, which are designed, simulated and compared to find the optimum solution. Single stage calibration is first performed followed by multi-stage design. Two different types of transistors in the STM 65nm CMOS technology are utilized in the design. The design and simulation results of key performance parameters are presented, compared, analyzed and synthesized. This report concludes with recommendation given in future work.