60GHz low noise amplifier for low power

• Main Author: Khoo, Doris Ming Hui.
• Other Authors: Boon Chirn Chye
• Format: Final Year Project
• Language: English
• Published: 2011
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Power electronics
• Online Access: http://hdl.handle.net/10356/46532
• Institution: Nanyang Technological University

The design of LNA is critical in overall receiver design, as it is usually placed in the first stage, to provide sufficient gain to suppress effect of noise from following stages, while adding minimal noise as possible. In this project, a Low Noise Amplifier (LNA) was designed and simulated in TSMC 65nm process using Cadence ADE L software. The topology used is Single-stage Cascode with inter-stage matching. LC load and inductive feedback in Common-gate stage was employed in the design as well. The LNA achieves gain of 10.32dB, Noise Figure (NF) of 4.892dB while drawing a current of 3mA from 1.2V supply. From simulation results, it is observed that the inter-stage matching and inductive feedback can help improve overall NF and gain respectively.