Design of a CMOS multistage amplifier
148 p.
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2011
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sg-ntu-dr.10356-469812023-07-04T15:52:55Z Design of a CMOS multistage amplifier Chong, Whye Seng. Tan Meng Tong School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits 148 p. A frequency compensation technique for a four-stage CMOS operational amplifier is designed, with particular emphasis on wide bandwidth and low power operation.This research work has devised a novel compensation strategy and a slew rate enhancement circuit for a four-stage CMOS operational amplifier that leads to significant performance in terms of bandwidth efficiency, silicon area under very heavy capacitive load, and achieve high ratio on the capacitance load to the compensation capacitor. Master of Science (Integrated Circuit Design) 2011-12-27T05:51:46Z 2011-12-27T05:51:46Z 2010 2010 Thesis http://hdl.handle.net/10356/46981 Nanyang Technological University application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Chong, Whye Seng. Design of a CMOS multistage amplifier |
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148 p. |
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Tan Meng Tong |
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Tan Meng Tong Chong, Whye Seng. |
format |
Theses and Dissertations |
author |
Chong, Whye Seng. |
author_sort |
Chong, Whye Seng. |
title |
Design of a CMOS multistage amplifier |
title_short |
Design of a CMOS multistage amplifier |
title_full |
Design of a CMOS multistage amplifier |
title_fullStr |
Design of a CMOS multistage amplifier |
title_full_unstemmed |
Design of a CMOS multistage amplifier |
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design of a cmos multistage amplifier |
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2011 |
url |
http://hdl.handle.net/10356/46981 |
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1772828203450105856 |