Skew-tolerant dynamic logic circuits

• المؤلف الرئيسي: Ong, Chi Boon.
• مؤلفون آخرون: Lau, Kim Teen
• التنسيق: Theses and Dissertations
• منشور في: 2008
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/4994
• المؤسسة: Nanyang Technological University

This dissertation discusses the overhead of traditional domino logic that consumes a higher cycle time. It also discusses the objective of skew-tolerant circuit design that includes the static and domino circuits. The advantage of skew-tolerant design is to avoid solid edges in which the data must meet the setup time before a clock edge. Apart from this, skew-tolerant domino circuits also use multi-overlapping clocking to reduce latches and thus eliminating solid edges and minimize the sequencing overhead.