Number theory based signal conversion and processing techniques

• Main Author: Vun, Chan Hua.
• Other Authors: Annamalai Benjamin Premkumar
• Format: Theses and Dissertations
• Language: English
• Published: 2012
• Subjects: DRNTU::Engineering::Computer science and engineering::Computer applications::Computers in other systems; DRNTU::Engineering::Computer science and engineering::Mathematics of computing; DRNTU::Engineering::Computer science and engineering::Hardware::Arithmetic and logic structures
• Online Access: http://hdl.handle.net/10356/50601
• Institution: Nanyang Technological University

While number theory has often been shown to possess great potentials for simplifying the execution of sophisticated signal processing routines, its practical applications typically need powerful computing resources and frequently rather complicated hardware circuitry in actual implementations. One such example is the residue number system (RNS) that theoretically can allow computations that involve large numbers to be performed using multiple small numbers in a parallel and independent manner, hence enabling faster processing speed and higher throughput. However, its practical applications are usually deterred by various implementation issues such as the difficulties in performing the binary-to-RNS forward conversion process, the inconvenience encountered during the execution of the modulo operation and the complication involved in performing the RNS-to-binary reverse conversion process. In this thesis, we propose novel applications of the RNS principles in two areas related to signal processing that circumvent some of these practical problems encountered when executing RNS based signal processing functions. This dissertation first presents a new encoding scheme based on the direct application of RNS principle to the hardware embodiment of an analog-to-digital converter (ADC) to greatly reduce the circuitry complexity required to implement high speed high resolution converter compared to existing techniques and prior arts. In addition, the proposed RNS ADC presents the output digital data in RNS representation such that no forward conversion is needed prior to application of modular arithmetic operations with the data. The architecture of the proposed RNS ADC is implemented based on the Folding and Interpolation (F&I) folder circuits, but with the circuits arranged in a way based on the RNS principles that leads to greatly reduced number of parallel paths compared to the parallel Flash ADC design. Furthermore, the proposed RNS ADC has potential to be implemented with inherent error detection and correction functions using the redundant RNS principle, which can also be extended to be used for power management purposes. This dissertation also presents a novel and radical approach to perform modular arithmetic using base-1 thermometer code (TC) encoded data format, which is also the raw data format output by the proposed RNS ADC. The thermometer code encoded residue (TCR) and its variant, the one-hot code encoded residue (OHR), greatly simplify the execution of the modulo operation when compared to the conventional base-2 binary code encoded residue (BCR). The TCR also enables the modular arithmetic addition and subtraction operations to be performed in a true carry-free manner with simple shifter based circuits. Because of the equal weight in all of the TCR’s bits, it is very simple to use it to implement the RNS based distributed arithmetic (DA) system for inner-product calculation compared to those based on conventional BCR. A TCR RNS-DA based FIR filter using combination of TCR, OHR and BCR is then presented in the thesis to demonstrate the effectiveness of this approach. Numerous SPICE simulations using standard circuit components and design techniques are also presented in the thesis to validate the practical feasibility of the proposed concepts, which at the same time demonstrate the effectiveness of using number theoretic approach to solve real world applications.