Run-time mapping techniques for NoC-based heterogeneous MPSoC platforms

• Main Author: Singh, Amit Kumar.
• Other Authors: Thambipillai Srikanthan
• Format: Theses and Dissertations
• Language: English
• Published: 2013
• Subjects: DRNTU::Engineering::Computer science and engineering::Computer systems organization::Performance of systems; DRNTU::Engineering::Computer science and engineering::Computer systems organization::Special-purpose and application-based systems; DRNTU::Engineering::Computer science and engineering::Computer systems organization::Processor architectures; DRNTU::Engineering::Computer science and engineering::Computer systems organization::Computer system implementation
• Online Access: http://hdl.handle.net/10356/51142
• Institution: Nanyang Technological University

The reliance on Multi-Processor Systems-on-Chip (MPSoCs) to satisfy the high performance requirement of complex embedded software applications is increasing. The Networks-on-Chip (NoCs) based interconnection infrastructure is fast becoming a preferred approach to facilitate communication among the processing elements (PEs) of MPSoCs. The heterogeneity of MPSoCs is also increasing by employing different types of PEs in order to meet the functional and non-functional requirements. This necessitates the need to realize efficient run-time mapping techniques for such heterogeneous computing platforms. In this thesis, a number of efficient techniques have been proposed to realize run-time mapping algorithms for heterogeneous MPSoC platforms. MPSoC with single-task supported PEs, each of which consisting of a general purpose processor or reconfigurable hardware is considered first. A new packing strategy to map the various tasks of an application in close proximity has been proposed to reduce the communication overhead. The proposed strategy was further extended to devise a time-bounded method to minimize the overall execution time of the mapping process. Performance evaluations based on 20 random applications show that the proposed techniques outperform the existing techniques by up to 22%. Subsequently, the proposed mapping process was extended to support an MPSoC platform in which each PE is capable of supporting multiple tasks. The extended techniques facilitate in the mapping of a group of communicating tasks on the same PE, thereby resulting in a further reduction in the communication overhead. The extended time-bounded method reduces the time required to identify the best mapping configuration. Moreover, the overall communication overhead is also reduced, resulting in improved performance. On average, channel load and total energy consumption is reduced by 10% and 46% respectively.