Non-linear analog circuits for self-organizing neuron and central pattern generator

• Main Author: Li, Fei.
• Other Authors: Chang Chip Hong
• Format: Theses and Dissertations
• Language: English
• Published: 2013
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits; DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: http://hdl.handle.net/10356/52928
• Institution: Nanyang Technological University

Implementations of the massively parallel structures of artificial neural networks (ANNs) and their associated non-linear mathematical learning functions by digital VLSI technology are costly and power-consuming. Leveraging on the native transistor’s non-linear I-V characteristics, analog circuit design techniques have their own merits for the implementation of neuromorphic networks. Inspired by the wide acceptance of ANNs as tools for solving complex engineering problems such as pattern classification and control of locomotion, this thesis tackles the challenges of designing critical functional components underpinning the two popular ANN models of self-organizing maps (SOMs) and central pattern generators (CPGs) based on analog VLSI technology. In this thesis, the first part presents a new low voltage and low power Gaussian function generator. The second part of the research focuses on the design of a compact neuron cell that can execute all the linear and nonlinear arithmetic operations required by a SOM with on-chip Gaussian taper learning. Besides, a novel oscillator architecture for CPGs is proposed and analyzed with dynamical systems analysis method.